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11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
27.2
Power Management Controller (PMC)
27.2.1
Description
The Power Management Controller (PMC) optimizes power consumption by controlling all sys-
tem and user peripheral clocks. The PMC enables/disables the clock inputs to many of the
peripherals and the Cortex-M4 Processor.
The Supply Controller selects between the 32 kHz RC oscillator or the crystal oscillator. The
unused oscillator is disabled automatically so that power consumption is optimized.
By default, at startup the chip runs out of the Master Clock using the Fast RC oscillator running
at 4 MHz.
The user can trim the 8 and 12 MHz RC Oscillator frequencies by software.
27.2.2
Embedded Characteristics
The Power Management Controller provides the following clocks:
• MCK, the Master Clock, programmable from a few hundred Hz to the maximum operating
frequency of the device. It is available to the modules running permanently, such as the
Enhanced Embedded Flash Controller.
• Processor Clock (HCLK), must be switched off when entering the processor in Sleep Mode.
• Free running processor Clock (FCLK)
• the Cortex-M4 SysTick external clock
• UDP Clock (UDPCK), required by USB Device Port operations.
• Peripheral Clocks, typically MCK, provided to the embedded peripherals (USART, SSC, SPI,
TWI, TC, HSMCI, etc.) and independently controllable. In order to reduce the number of clock
names in a product, the Peripheral Clocks are named MCK in the product datasheet.
Programmable Clock Outputs can be selected from the clocks provided by the clock generator
and driven on the PCKx pins.
The Power Management Controller also provides the following operations on clocks:
• a main crystal oscillator clock failure detector.
• a frequency counter on main clock and an on-the-fly adjustable main RC oscillator frequency.
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