USCI Operation: I2C Mode
21-16
Universal Serial Communication Interface, I2C Mode
Figure 21−12 illustrates the I
2
C master transmitter operation.
Figure 21−12. I
2
C Master Transmitter Mode
Other master continues
S
SLA/W
A
DATA
A
P
Successful
transmission to a
slave receiver
UCBxTXIFG= 1
DATA
DATA
A
A
UCTXSTP= 1
UCBxTXIFG=0
Next transfer started
with a repeated start
condition
DATA
A
S
SLA/W
1) UCTR= 1(Transmitter)
2) UCTXSTT= 1
DATA
A
S
SLA/R
1) UCTR= 0(Receiver)
2) UCTXSTT= 1
3) UCBxTXIFG= 0
Not acknowledge
received after slave
address
P
S
SLA/W
S
SLA/R
UCTXSTP= 1
1) UCTR= 1(Transmitter)
2) UCTXSTT= 1
1) UCTR= 0(Receiver)
2) UCTXSTT= 1
Arbitration lost in
slave address or
data byte
A
A
Other master continues
Arbitration lost and
addressed as slave
Other master continues
A
UCALIFG= 1
UCMST= 0
UCTR= 0(Receiver)
UCSTTIFG= 1
(UCGC= 1if general call)
UCBxTXIFG= 0
UCSTPIFG= 0
USCI continues as Slave Receiver
Not acknowledge
received after a data
byte
UCTXSTT= 0
UCTXSTP= 0
UCTXSTP= 0
UCALIFG= 1
UCMST= 0
(UCSTTIFG= 0)
Bus stalled (SCL held low)
until data available
Write data to UCBxTXBUF
1) UCTR= 1(Transmitter)
2) UCTXSTT= 1
UCBxTXIFG= 1
UCBxTXBUF discarded
UCTXSTT= 0
UCNACKIFG= 1
UCBxTXIFG= 0
UCBxTXBUF discarded
UCBxTXIFG= 1
UCBxTXBUF discarded
UCNACKIFG= 1
UCBxTXIFG= 0
UCBxTXBUF discarded
UCALIFG= 1
UCMST= 0
(UCSTTIFG= 0)
Summary of Contents for MSP430x4xx Family
Page 1: ...MSP430x4xx Family 2007 Mixed Signal Products User s Guide SLAU056G ...
Page 2: ......
Page 6: ...vi ...
Page 114: ...3 76 RISC 16 Bit CPU ...
Page 304: ...5 20 FLL Clock Module ...
Page 340: ...7 8 Supply Voltage Supervisor ...
Page 348: ...8 8 16 Bit Hardware Multiplier ...
Page 372: ...9 24 32 Bit Hardware Multiplier ...
Page 400: ...10 28 DMA Controller ...
Page 428: ...13 10 Basic Timer1 ...
Page 466: ...15 24 Timer_A ...
Page 522: ...17 30 USART Peripheral Interface UART Mode ...
Page 544: ...18 22 USART Peripheral Interface SPI Mode ...
Page 672: ...23 12 Comparator_A ...
Page 692: ...24 20 LCD Controller ...
Page 746: ...26 28 ADC12 ...