USCI Operation: UART Mode
19-13
Universal Serial Communication Interface, UART Mode
19.3.6 Automatic Error Detection
Glitch suppression prevents the USCI from being accidentally started. Any
pulse on UCAxRXD shorter than the deglitch time t
τ
(approximately 150 ns)
will be ignored. See the device-specific data sheet for parameters.
When a low period on UCAxRXD exceeds t
τ
a majority vote is taken for the
start bit. If the majority vote fails to detect a valid start bit the USCI halts
character reception and waits for the next low period on UCAxRXD. The
majority vote is also used for each bit in a character to prevent bit errors.
The USCI module automatically detects framing errors, parity errors, overrun
errors, and break conditions when receiving characters. The bits UCFE,
UCPE, UCOE, and UCBRK are set when their respective condition is
detected. When the error flags UCFE, UCPE or UCOE are set, UCRXERR is
also set. The error conditions are described in Table 19−1.
Table 19−1.Receive Error Conditions
Error Condition
Error
Flag
Description
Framing error
UCFE
A framing error occurs when a low stop bit is
detected. When two stop bits are used, both
stop bits are checked for framing error. When a
framing error is detected, the UCFE bit is set.
Parity error
UCPE
A parity error is a mismatch between the
number of 1s in a character and the value of
the parity bit. When an address bit is included
in the character, it is included in the parity
calculation. When a parity error is detected, the
UCPE bit is set.
Receive overrun
UCOE
An overrun error occurs when a character is
loaded into UCAxRXBUF before the prior
character has been read. When an overrun
occurs, the UCOE bit is set.
Break condition
UCBRK
When not using automatic baud rate detection,
a break is detected when all data, parity, and
stop bits are low. When a break condition is
detected, the UCBRK bit is set. A break
condition can also set the interrupt flag
UCAxRXIFG if the break interrupt enable
UCBRKIE bit is set.
When UCRXEIE = 0 and a framing error, or parity error is detected, no
character is received into UCAxRXBUF. When UCRXEIE = 1, characters are
received into UCAxRXBUF and any applicable error bit is set.
When UCFE, UCPE, UCOE, UCBRK, or UCRXERR is set, the bit remains set
until user software resets it or UCAxRXBUF is read. UCOE must be reset by
reading UCAxRXBUF. Otherwise it will not function properly. To detect
overflows reliably the following flow is recommended. After a character was
received and UCAxRXIFG is set, first read UCAxSTAT to check the error flags
including the overflow flag UCOE. Read UCAxRXBUF next. This will clear all
Summary of Contents for MSP430x4xx Family
Page 1: ...MSP430x4xx Family 2007 Mixed Signal Products User s Guide SLAU056G ...
Page 2: ......
Page 6: ...vi ...
Page 114: ...3 76 RISC 16 Bit CPU ...
Page 304: ...5 20 FLL Clock Module ...
Page 340: ...7 8 Supply Voltage Supervisor ...
Page 348: ...8 8 16 Bit Hardware Multiplier ...
Page 372: ...9 24 32 Bit Hardware Multiplier ...
Page 400: ...10 28 DMA Controller ...
Page 428: ...13 10 Basic Timer1 ...
Page 466: ...15 24 Timer_A ...
Page 522: ...17 30 USART Peripheral Interface UART Mode ...
Page 544: ...18 22 USART Peripheral Interface SPI Mode ...
Page 672: ...23 12 Comparator_A ...
Page 692: ...24 20 LCD Controller ...
Page 746: ...26 28 ADC12 ...