USART Registers: UART Mode
17-25
USART Peripheral Interface, UART Mode
UxBR0, USART Baud Rate Control Register 0
7
6
5
4
3
2
1
0
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
rw
rw
rw
rw
rw
rw
rw
rw
UxBR1, USART Baud Rate Control Register 1
7
6
5
4
3
2
1
0
2
15
2
14
2
13
2
12
2
11
2
10
2
9
2
8
rw
rw
rw
rw
rw
rw
rw
rw
UxBRx
The valid baud-rate control range is 3
≤
UxBR
<
0FFFFh, where
UxBR = {UxBR1+UxBR0}. Unpredictable receive and transmit timing
occurs if UxBR < 3.
UxMCTL, USART Modulation Control Register
7
6
5
4
3
2
1
0
m7
m6
m5
m4
m3
m2
m1
m0
rw
rw
rw
rw
rw
rw
rw
rw
UxMCTLx
Bits
7−0
Modulation bits. These bits select the modulation for BRCLK.
Summary of Contents for MSP430x4xx Family
Page 1: ...MSP430x4xx Family 2007 Mixed Signal Products User s Guide SLAU056G ...
Page 2: ......
Page 6: ...vi ...
Page 114: ...3 76 RISC 16 Bit CPU ...
Page 304: ...5 20 FLL Clock Module ...
Page 340: ...7 8 Supply Voltage Supervisor ...
Page 348: ...8 8 16 Bit Hardware Multiplier ...
Page 372: ...9 24 32 Bit Hardware Multiplier ...
Page 400: ...10 28 DMA Controller ...
Page 428: ...13 10 Basic Timer1 ...
Page 466: ...15 24 Timer_A ...
Page 522: ...17 30 USART Peripheral Interface UART Mode ...
Page 544: ...18 22 USART Peripheral Interface SPI Mode ...
Page 672: ...23 12 Comparator_A ...
Page 692: ...24 20 LCD Controller ...
Page 746: ...26 28 ADC12 ...