Sony CXD5602, User Manual

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CXD5602 User Manual
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Table ADC-780 SCU_ADCIF_REG Register List
Offset Address
(Transaction Port)
Name Type Size
(bits)
Description Reset Value
0x200 LPADC_A0 RW 32 LPADC enable control 0x00000000
0x204 LPADC_A1 RW 32 LPADC channel switching control 0x00000000
0x210 LPADC_D0 RW 32 LPADC software reset 0x00000000
0x214 LPADC_D1 RW 32 LPADC basic setting 0x00000008
0x218 LPADC_D2 RW 32 Permission/prohibition of the LPADC
ADC data acceptance
0x00000000
0x21C LPADC_D4 RW 32 LPADC basic setting 0x00000008
0x220 LPADC_D5 RW 32 LPADC basic setting 0x00000008
0x224 LPADC_D6 RW 32 LPADC basic setting 0x00000008
0x240 HPADC_AC0 RW 32 HPADC common clock control 0x00000000
0x244 HPADC_AC1 RW 32 HPADC common enable control 0x00000000
0x250 HPADC_DC RW 32 Permission/prohibition of handling two
element vector
0x00000000
0x280 HPADC0_A0 RW 32 HPADC0 clock selection 0x00000000
0x284 HPADC0_A1 RW 32 HPADC0 enable control 0x00000000
0x288 HPADC0_A2 RW 32 HPADC0 clock enable control 0x00000000
0x28C HPADC0_A3 RW 32 HPADC0 LPF control 0x00000100
0x290 HPADC0_D0 RW 32 HPADC0 software reset 0x00000000
0x294 HPADC0_D1 RW 32 HPADC0 basic setting 0x00000010
0x298 HPADC0_D2 RW 32 Permission/prohibition of the HPADC0
ADC data acceptance
0x00000000
0x2C0 HPADC1_A0 RW 32 HPADC1 clock selection 0x00000000
0x2C4 HPADC1_A1 RW 32 HPADC1 enable control 0x00000000
0x2C8 HPADC1_A2 RW 32 HPADC1 clock enable control 0x00000000
0x2CC HPADC1_A3 RW 32 HPADC1 LPF control 0x00000100
0x2D0 HPADC1_D0 RW 32 HPADC1 software reset 0x00000000
0x2D4 HPADC1_D1 RW 32 HPADC1 basic setting 0x00000010
0x2D8 HPADC1_D2 RW 32 Permission/prohibition of the HPADC1
ADC data acceptance
0x00000000
0x3D0 ADCIF_DCT RO 32 SCU_ADCIF register map revision code 0xADC1F000
0x3D4 SCU_ADCIF_C
KPOWER
RW 32 0x00000001