Sony CXD5602, User Manual

Page: 160 / 1010

CXD5602 User Manual
－
160/1010
－
3.5.3 Analog Circuits
The CRG has three analog circuits (RCOSC block, XOSC block, and SYSPLL block). The following shows the
setting confirmation registers of each analog circuit. Some of them are RW registers, but use them as RO registers.
For descriptions of the RF block, refer to Section 3.12.
3.5.3.1 RCOSC Block Setting Confirmation
The RCOSC is an internal ring oscillator that operates at 8.192 MHz. In initial state, the oscillation frequency is
higher than 8.192 MHz, but by using the calibration process of the API, it can be adjusted to 8.192 MHz.
3.5.3.1.1 Register Descriptions
Table Clock and Reset (Clock Reset Generator)-51 shows the control registers related to the RCOSC block.
Table Clock and Reset (Clock Reset Generator)-51 RCOSC Block Status Registers
Address Register
Name
Bit Field
Name
Type Bit Initial
Value
Description
0x04100590 RCOSC_
CTRL1
Reserved RW [31:15] 0 Reserved
IRO_LV_SENSCLK_
XEN
RW [14] 1 Indicated as ANA(1) in
Figure Clock and
Reset (Clock Reset Generator)-34
Clock Enable for HPADC
0: Enable, 1: Disable
IRO_LV_LOGICLK_
XEN
RW [13] 0
Indicated as ANA(0) in
Figure Clock and
Reset (Clock Reset Generator)-34
Clock Enable for each function block
0: Enable, 1: Disable
Reserved RW [12:0] 1 Reserved
3.5.3.2 XOSC Block Setting Confirmation
The XOSC operates at the following 5 frequencies. The selectable frequencies are different between internal
oscillation and external clock input mode.

Frequency
26 MHz

Mode

Internal oscillation mode (system configuration using crystal oscillation)
*Supported frequencies: 26 MHz

External clock input mode (system configuration using TCXO)