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2-2
Section
CPM2A/CPM2C High-speed Counters
47
2-2-1 Using High-speed Counters
The CPM2A/CPM2C’s CPU Unit has one built-in channel for a high-speed
counter that can count inputs at a maximum of 20 kHz. Using this in conjunction
with the interrupt function enables target value comparison control or range
comparison control to be executed without deviating from the cycle time.
Counter inputs
Reset input
Sensor
Rotary encoder
Item
Input mode
Differential phase
Pulse + direction
Up/down input
Increment
Input
b
00000
Phase-A inputs
Pulse inputs
CW inputs
Pulse inputs
p
number
00001
Phase-B inputs
Direction inputs
CCW inputs
See note 1.
00002
Phase-Z inputs (Reset inputs) (See note 1.)
Input method
Differential phase
inputs (4X)
Phase inputs
Phase inputs
Phase inputs
Response frequency
5 kHz
20 kHz
20 kHz
20 kHz
Count value
–8388608 to 8388607
0 to 16777215
Counter PV storage destination
(See note 2.)
Words SR 248 (rightmost digit) and SR 249 (leftmost digit)
Interrupts
Target value
comparison
Up to 16 target values and interrupt subroutine numbers can be registered in either
the incrementing or decrementing direction.
Range comparison
Up to eight ranges (with upper and lower limits) and subroutine numbers can be
registered.
Counter reset method
Phase-Z software reset: Counter is reset when IR 00002 turns ON while
SR 25200 is ON.
Software reset: Counter is reset when SR 25200 turns ON.
Note
1. Input points not used for counter inputs can be used as ordinary inputs.
2. When not used for the counter PV storage destination, these words can be
used as ordinary IR words.
3. SR 25200 is read once each cycle. Up to one cycle may be required for a
reset to occur on the leading edge of phase Z.
The following table shows the relationships between the high-speed counter
and the CPM2A/CPM2C’s other functions.