7-29
Section
Interrupt Control Instructions
503
Set C1=3 to restart decrementing counters or C1=4 (CPM2A/CPM2C PCs only)
to restart incrementing counters.
Set the corresponding bit in C2 to 0 to refresh the input’s counter SV and unmask
the interrupt. (Bits 00 to 03 correspond to 00003 to 00006.)
Interrupt input 00003 counter
Interrupt input 00004 counter
Interrupt input 00005 counter
Interrupt input 00006 counter
Word C2 bits: 3 2 1 0
Use the differentiated variation (@INT(89)) or an input condition that is ON for
just one cycle when executing INT(89) with C1=003 or C1=004. The counter PV
will be reset to the SV if INT(89) is executed while the counter is operating, so the
interrupt will never be generated if INT(89) is executed every cycle.
When INT(89) is executed with C1=003 or C1=004 and the SV word contains a
non-zero SV (0001 to FFFF), the corresponding counter will begin operating
(decrementing or incrementing) and the corresponding interrupt will be enabled
in counter mode. When the count reaches the SV, an interrupt will be generated
and the PV will be returned to the SV, so interrupts will be generated repeatedly
until the counter is stopped.
Writing 0000 to a counter’s SV word (SR 240 to SR 243) and executing INT(89)
to refresh the SV will stop the counter and disable the corresponding interrupt.
To restart the counter, write the non-zero SV to its SV word and execute INT(89).
(The SV words are reset to 0000 at the start of operation, so the counter’s SV
must be written to its SV word from the ladder program.)
When an interrupt has already been enabled (unmasked), the SV cannot be re-
freshed just by writing a new value to the SV word. Refresh the SV by executing
INT(89) with C1=003 (C1=004 for an incrementing counter).
A counter mode interrupt can be masked by executing INT(89) with C1=000 and
the corresponding bit in C2 set to 1, but an input will operate in interrupt input
mode, not counter mode, when its corresponding bit in C2 is set to 0.
All interrupts, including input interrupts, interval timer interrupts, and high-speed
counter interrupts, can be masked or unmasked as a group by executing
INT(89) with C1=100 or C1=200. The masked inputs are recorded, but ignored.
The global mask is in addition to any masks on the individual types of interrupts.
Furthermore, clearing the masks for all interrupts does not clear the masks on
the individual types of interrupts, but restores them to the masked conditions that
existed before INT(89) was executed to mask them as a group.
Do not use INT(89) to mask interrupts unless it is necessary to temporarily mask
all interrupts. Always use INT(89) instructions in pairs to do so, using the first
INT(89) instruction to mask all interrupts and the second one to unmask all inter-
rupts.
INT(89) cannot be used to mask and unmask all interrupts from within interrupt
routines.
Masking Interrupts (C1=100)
Use the INT(89) instruction with C1=100 to mask all interrupts.
(@)INT(89)
100
000
000
If an interrupt is generated while interrupts are masked, interrupt processing will
not be executed but the interrupt will be recorded for the input, interval timer, and
high-speed counter interrupts. The interrupts will then be serviced as soon as
interrupts are unmasked.
Masking or Unmasking All
Interrupts
(C1=100 or C1=200)
