NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
FXTH87ERM
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Reference manual
Rev. 5.0 — 4 February 2019
78 / 183
Effect
on CCR
Source Form
Operation
Description
V H I N Z C
Address
Mode
Opcode Operand
Bus
Cycles
[1]
JSR
opr8a
JSR
opr16a
JSR
oprx16
,X
JSR
oprx8
,X
JSR ,X
Jump to
Subroutine
PC ← (PC) + n (n =
1, 2, or 3)
Push (PCL); SP ←
(SP) – 0x0001
Push (PCH); SP ←
(SP) – 0x0001
PC ← Unconditional
Address
– – – – – –
DIR
EXT
IX2
IX1
IX
BD
CD
DD
ED
FD
dd
hh ll
ee ff
ff
5
6
6
5
5
LDA
#opr8i
LDA
opr8a
LDA
opr16a
LDA
oprx16
,X
LDA
oprx8
,X
LDA ,X
LDA
oprx16
,SP
LDA
oprx8
,SP
Load
Accumulator from
Memory
A ← (M)
0 – – Þ Þ –
IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
A6
B6
C6
D6
E6
F6
9ED6
9EE6
ii
dd
hh ll
ee ff
ff
ee ff
ff
2
3
4
4
3
3
5
4
LDHX
#opr16i
LDHX
opr8a
LDHX
opr16a
LDHX ,X
LDHX
oprx16
,X
LDHX
oprx8
,X
LDHX
oprx8
,SP
Load Index
Register
(H:X) from
Memory
H:X ← (M:M +
0x0001)
0 – – Þ Þ –
IMM
DIR
EXT
IX
IX2
IX1
SP1
45
55
32
9EAE
9EBE
9ECE
9EFE
jj kk
dd
hh ll
ee ff
ff
ff
3
4
5
5
6
5
5
LDX
#opr8i
LDX
opr8a
LDX
opr16a
LDX
oprx16
,X
LDX
oprx8
,X
LDX ,X
LDX
oprx16
,SP
LDX
oprx8
,SP
Load X (Index
Register Low)
from Memory
X ← (M)
0 – – Þ Þ –
IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
AE
BE
CE
DE
EE
FE
9EDE
9EEE
ii
dd
hh ll
ee ff
ff
ee ff
ff
2
3
4
4
3
3
5
4
LSL
opr8a
LSLA
LSLX
LSL
oprx8
,X
LSL ,X
LSL
oprx8
,SP
Logical Shift Left
(Same as ASL)
b0
0
b7
C
aaa-028008
Þ – – Þ Þ Þ
DIR
INH
INH
IX1
IX
SP1
38
48
58
68
78
9E68
dd
ff
ff
5
1
1
5
4
6
LSR
opr8a
LSRA
LSRX
LSR
oprx8
,X
LSR ,X
LSR
oprx8
,SP
Logical Shift
Right
b0
0
b7
C
aaa-028009
Þ – – 0 Þ Þ
DIR
INH
INH
IX1
IX
SP1
34
44
54
64
74
9E64
dd
ff
ff
5
1
1
5
4
6
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