NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
FXTH87ERM
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Reference manual
Rev. 5.0 — 4 February 2019
14 / 183
Mode
STOP1
STOP4
Sensor Measurement Interface (SMI)
Off
Optionally On
Pressure P-cell
Off
Optionally On
Optional Acceleration g-cell
Off
Optionally On
Temperature Sensor (in ADC10)
Off
Optionally On
[3]
Normal Temperature Restart
Optionally On
Optionally On
Voltage Reference (in ADC10)
Off
Optionally On
(3)
LFR Detector
[4]
Periodically On
Periodically On
LFR Decoder
Optionally On
Optionally On
RF Controller, Data Buffer, Encoder
Optionally On
Optionally On
RF Transmitter
[5]
Optionally On
Optionally On
ADC10
Off
Optionally On
(3)
Regulator
Off
On
I/O Pins
Hi-Z
States Held
Wakeup Methods
Interrupts, resets
Interrupts, resets
Computer Operating Properly (COP) watchdog
Off
Off
[1]
The interrupt from RTI operates from all power modes, however the RTIF flag will not be set and the interrupt service
routine will not execute if the RTI is configured and STOP1 mode entered. RTIF flag and the interrupt service routine will
execute if in Run mode or if STOP4 is entered.
[2]
MFO oscillator started if the LFR detectors are periodically sampled, the LFR detectors detect an input signal; a pressure
or acceleration reading is in progress or the RF state machine is sending data.
[3]
Requires internal ADC10 clock to be enabled.
[4]
Period of sampling set by MCU.
[5]
RF data buffer may be set up to run while the CPU is in the STOP modes.
Specific to the tire pressure monitoring application the parameter registers and the LFO
with wakeup timer are powered up at all times whenever voltage is applied to the supply
pins. The LFR detector and MFO may be periodically powered up by the LFR decoder.
5.5.3 Active BDM enabled in STOP mode
Entry into the ACTIVE BACKGROUND DEBUG mode from RUN mode is enabled if
the ENBDM bit in BDCSCR is set. The BDCSCR register is not memory mapped so
it can only be accessed through the BDM interface by use of the BDM commands
READ_STATUS and WRITE_CONTROL. If ENBDM is set when the CPU executes a
STOP instruction, the system clocks to the BACKGROUND DEBUG logic remain active
when the MCU enters STOP mode so BACKGROUND DEBUG communication is still
possible. In addition, the voltage regulator does not enter its low-power standby state but
maintains full internal regulation. If the user attempts to enter the STOP1 with ENDBM
set, the MCU will instead enter this mode which is STOP4 with system clocks running.
Most BACKGROUND commands are not available in STOP mode. The memory-access-
with-status commands do not allow memory access, but they report an error indicating
that the MCU is in STOP mode. The BACKGROUND command can be used to wake the
MCU from stop and enter ACTIVE BACKGROUND mode if the ENDBM bit is set. Once
in BACKGROUND DEBUG mode, all BACKGROUND commands are available.
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