NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
FXTH87ERM
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© NXP B.V. 2019. All rights reserved.
Reference manual
Rev. 5.0 — 4 February 2019
20 / 183
Address
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
$0020-27
LFR Registers
LFR Registers, see
Table 8
and
Table 9
$0028
ADSC1
COCO
AIEN
ADCO
ADCH[4:0]
$0029
ADSC2
ADACT
ADTRG
ACFE
ADCFGT
0
0
0
0
$002A
ADRH
0
0
0
0
ADR[11:8]
$002B
ADRL
ADR[7:0]
$002C
ADCVH
0
0
0
0
ADCV[11:8]
$002D
ADCVL
ADCV[7:0]
$002E
ADCFG
ADLPC
ADIV[1:0]
ADLSMP
MODE[1:0]
ADICLK[1:0]
$002F
ADPCTL1
ADPC[7:0]
$0030-4F
RFM Registers
RFM Registers, see
Table 10
and
Table 11
$0050-8F
Parameter Reg
PARAM[63:0]
Note:
Shaded bits are recommended to only be controlled by firmware or factory test.
= reserved
Table 8. LFR register summary - LPAGE = 0
Address
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
$0020
LFCTL1
LFEN
SRES
CARMOD
LPAGE
IDSEL[1:0]
SENS[1:0]
$0021
LFCTL2
LFSTM[3:0]
LFONTM[3:0]
$0022
LFCTL3
LFDO
TOGMOD
SYNC[1:0]
LFCDTM[3:0]
$0023
LFCTL4
LFDRIE
LFERIE
LFCDIE
LFIDIE
DECEN
VALEN
TIMOUT[1:0]
$0024
LFS
LFDRF
LFERF
LFCDF
LFIDF
LFOVF
LFEOMF
LPSM
LFIAK
$0025
LFDATA
RXDATA[7:0]
$0026
LFIDL
ID[7:0]
$0027
LFIDH
ID[15:8]
Table 9. LFR register summary - LPAGE = 1
Address
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
$0020
LFCTL1
LFEN
SRES
CARMOD
LPAGE
IDSEL[1:0]
SENS[1:0]
$0021
LFCTRLE
TRIMEE
AZSC[2:0]
$0022
LFCTRLD
AVFOF[1:0]
DEQS
AZDC[1:0]
ONMODE
CHK125[1:0]
$0023
LFCTRLC
AMPGAIN[1:0]
FINSEL[1:0]
AZEN
LOWQ[1:0]
DEQEN
$0024
LFCTRLB
HYST[1:0]
LFFAF
LFCAF
LFPOL
LFCPTAZ[2:0]
$0025
LFCTRLA
TESTSEL[3:0]
LFCC[3:0]
$0026
Reserved
$0027
Reserved
Note:
Shaded bits are recommended to only be controlled by firmware or factory test.
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