NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
FXTH87ERM
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Reference manual
Rev. 5.0 — 4 February 2019
123 / 183
Field
Description
3:2
IDSEL[1:0]
Wakeup ID Selection — Selects the existence and length of the wakeup ID. Reset clears these bits.
00 No ID expected
01 8-bit ID based on the contents of the LFIDL register
10 16-bit ID based on the contents of the LFIDH and LFIDL registers
11 8-bit ID matches the contents of either the LFIDH or LFIDL registers
1:0
SENS[1:0]
Sensitivity Control — These two read/write control bits select the sensitivity thresholds for the LFR input.
These thresholds apply to the detection portion of a message. If the input level is below the S
NODET_x
level,
no signal will be detected. If the level is above S
DET_x
, the signal will be detected. Sensitivity settings are
only used in the carrier detect path and do not affect reception of the message body.
00 Performance not specified
01 Low sensitivity (S
DET_L
; S
NODET_L
)
10 High sensitivity (S
DET_H
; S
NODET_H
)
11 Performance not specified
14.17.2 LF control register 2 (LFCTL2)
LFCTL2 contains the selection bits for the length of the LF sampling ON time and the
time interval between samples as shown in
Table 108
.
Table 108. LFR control register 2 (LFCTL2) (address $0021)
Bit
7
6
5
4
3
2
1
0
R
W
LFSTM[3:0]
LFONTM[3:0]
Reset
0
1
1
0
0
0
0
0
Table 109. LFCTL2 register field descriptions
Field
Description
7:4
LFSTM[3:0]
LF Sampling Time Interval Select — These read/write control bits select the length of time between when
the LFR input detector is turned on as set by the LFONTM bits in LFCTL2 register. The initial sampling
interval starts with the LFO clock following a write to these bits. A reset of the LFR results in the value being
set to binary 0110.
0000 Continuous ON mode (see
Section 14.15 "Continuous ON mode"
)
0001 Sampled decoding mode every 16 LFO clock periods (16 milliseconds nominal)
0010 Sampled decoding mode every 32 LFO clock periods (32 milliseconds nominal)
0011 Sampled decoding mode every 64 LFO clock periods (64 milliseconds nominal)
0100 Sampled decoding mode every 128 LFO clock periods (128 milliseconds nominal)
0101 Sampled decoding mode every 256 LFO clock periods (256 millisecond nominal)
0110 Sampled decoding mode every 512 LFO clock periods (512 milliseconds nominal)
0111 Sampled decoding mode every 1024 LFO clock periods (1024 milliseconds nominal)
1000 Sampled decoding mode every 2048 LFO clock periods (2048 milliseconds nominal)
1001 Sampled decoding mode every 4096 LFO clock periods (4096 milliseconds nominal)
1010-1xxx Continuous ON mode (see
Section 14.15 "Continuous ON mode"
)
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