NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
FXTH87ERM
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Reference manual
Rev. 5.0 — 4 February 2019
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from all low power modes. The LFO is always active and cannot be powered off by any
software control. The control bits for the RTI are shown in
Table 34
.
Note:
Regarding wake-up from Stop1, the reset vector is accessed, taking precedence
over the interrupt vector.
Table 34. RTI Status/Control register (SRTISC) (address $1808)
Bit
7
6
5
4
3
2
1
0
R
RTIF
0
W
RTIACK
RTICLKS
RTIE
0
RTIS[2:0]
Reset
0
0
0
0
0
0
0
0
POR
0
0
0
0
0
0
0
0
= Reserved
Table 35. SRTISC register field descriptions
Field
Description
7
RTIF
RTI Interrupt Flag — The RTIF bit indicates when a wakeup interrupt has been generated by the RTI if
configured from Run or STOP4 modes. Writing a zero to this bit has no effect. Reset or exit from STOP1
clears this bit.
0 Wakeup interrupt not generated or was previously acknowledged.
1 Wakeup interrupt generated.
6
RTIACK
Acknowledge RTIF Interrupt Flag — The RTIACK bit clears the RTIF bit if written with a one. Writing a zero
to the RTIACK bit has no effect on the RTIF bit. Reading the RTIACK bit returns a zero. Reset has no effect
on this bit.
0 No effect.
1 Clear RTIF bit.
5
RTICLKS
RTI Interrupt Clock Select — This read-write bit selects the clock source for the real-time interrupt request
0 Real-time interrupt request clock source is the LFO.
1 Real-time interrupt request clock source is the HFO (MCU must be in the RUN mode).
4
RTIE
RTIF Interrupt Enable — The RTIE bit enables RTI interrupts if written with a one. Reset clears this bit.
0 Disable RTI interrupts.
1 Enable RTI interrupts.
3
Unused
Unused
2:0
RTIS[2:0]
RTI Interrupt Delay Selects — The RTIS[2:0] bits select the timing of the RTI interrupts as given in
Table 36
.
Reset clears these bits.
Table 36. Real-time interrupt period
RTIS2
RTIS1
RTIS0
Delay Timing (ms)
(Dependent on 1-kHz LFO)
0
0
0
OFF
0
0
1
2
0
1
0
4
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