User Manual
472
Rev. 1.1
2019-03-18
TLE984xQX
Microcontroller with LIN and Power Switches for Automotive Applications
General Purpose Timer Units (GPT12)
16.4.3
GPT2 Auxiliary Timer T5 Control
Auxiliary timer T5 can be configured for Timer Mode, Gated Timer Mode, or Counter Mode with the same
options for the timer frequencies and the count signal as the core timer T6. In addition to these 3 counting
modes, the auxiliary timer can be concatenated with the core timer. The contents of T5 may be captured to
register CAPREL upon an external or an internal trigger. The start/stop function of the auxiliary timers can be
remotely controlled by the T6 run control bit. Several timers may thus be controlled synchronously.
The current contents of the auxiliary timer are reflected by its count register T5. This register can also be
written to by the CPU, for example, to set the initial start value.
The individual configurations for timer T5 are determined by its control register T5CON. Some bits in this
register also control the function of the CAPREL register. Note that functions which are present in all timers of
block GPT2 are controlled in the same bit positions and in the same manner in each of the specific control
registers.
Note:
The auxiliary timer has no output toggle latch and no alternate output function.
Timer T5 Run Control
The auxiliary timer T5 can be started or stopped by software in two different ways:
• Through the associated timer run bit (T5R). In this case it is required that the respective control bit
T5RC = 0.
• Through the core timer’s run bit (T6R). In this case the respective remote control bit must be set (T5RC = 1).
The selected run bit is relevant in all operating modes of T5. Setting the bit will start the timer, clearing the bit
stops the timer.
In Gated Timer Mode, the timer will only run if the selected run bit is set and the gate is active (high or low, as
programmed).
Note:
If remote control is selected T6R will start/stop timer T6 and the auxiliary timer T5 synchronously.
