User Manual
437
Rev. 1.1
2019-03-18
TLE984xQX
Microcontroller with LIN and Power Switches for Automotive Applications
General Purpose Timer Units (GPT12)
16.3.1
GPT1 Core Timer T3 Control
The current contents of the core timer T3 are reflected by its count register T3. This register can also be written
to by the CPU, for example, to set the initial start value.
The core timer T3 is configured and controlled via its control register T3CON.
Timer T3 Run Control
The core timer T3 can be started or stopped by software through bit T3R (Timer T3 Run Bit). This bit is relevant
in all operating modes of T3. Setting bit T3R will start the timer, clearing bit T3R stops the timer.
In Gated Timer Mode, the timer will only run if T3R = 1 and the gate is active (high or low, as programmed).
Note:
When bit T2RC or T4RC in timer control register T2CON or T4CON is set, bit T3R will also control (start
and stop) the auxiliary timer(s) T2 and/or T4.
Count Direction Control
The count direction of the GPT1 timers (core timer and auxiliary timers) can be controlled either by software
or by the external input pin TxEUD (Timer Tx External Up/Down Control Input). These options are selected by
bits TxUD and TxUDE in the respective control register TxCON. When the up/down control is provided by
software (bit TxUDE = 0), the count direction can be altered by setting or clearing bit TxUD. When bit
TxUDE = 1, pin TxEUD is selected to be the controlling source of the count direction. However, bit TxUD can
still be used to reverse the actual count direction, as shown in
. The count direction can be changed
regardless of whether or not the timer is running.
Note:
When pin TxEUD is used as external count direction control input, it must be configured as input.
