Infineon TLE984 QX Series, User Manual

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User Manual 453 Rev. 1.1
2019-03-18
TLE984xQX
Microcontroller with LIN and Power Switches for Automotive Applications
General Purpose Timer Units (GPT12)
Figure 101 shows an example for the generation of a PWM signal using the “single-transition” reload
mechanism. T2 defines the high time of the PWM signal (reloaded on positive transitions) and T4 defines the
low time of the PWM signal (reloaded on negative transitions). The PWM signal can be output on pin T3OUT if
T3OE = 1. With this method, the high and low time of the PWM signal can be varied in a wide range.
Note: The output toggle latch T3OTL is accessible via software and may be changed, if required, to modify
the PWM signal.
However, this will NOT trigger the reloading of T3.
Figure 101 GPT1 Timer Reload Configuration for PWM Generation
Note: Although possible, selecting the same reload trigger event for both auxiliary timers should be
avoided. In such a case, both reload registers would try to load the core timer at the same time. If
this combination is selected, T2 is disregarded and the contents of T4 is reloaded.
16.3.5 GPT1 Clock Signal Control
All actions within the timer block GPT1 are triggered by transitions of its basic clock. This basic clock is derived
from the system clock by a basic block prescaler, controlled by bitfield BPS1 in register T3CON (see
Figure 83 ).
The count clock can be generated in two different ways:
•
Internal count clock , derived from GPT1’s basic clock via a programmable prescaler, is used for (gated)
Timer Mode.
• External count clock , derived from the timer’s input pin(s), is used for Counter Mode.
MCA05401
T2IRQ
Auxiliary
Timer T2
Edge
Select
T2I
Reload
0
1
MUX
T2I.2
Toggle Latch T3OUT
T3IRQ
Count
T3R
Core Timer T3
Operating
Mode
Control
BPS1 T3I
Up/Down
T3IN
f
GPT
T2IN
Auxiliary
Timer T4
Edge
Select
T4I
Reload
0
1
MUX
T4I.2
T4IN
T4IRQ