User Manual
620
Rev. 1.1
2019-03-18
TLE984xQX
Microcontroller with LIN and Power Switches for Automotive Applications
Capture/Compare Unit 6 (CCU6)
18.11
TLE984xQX Module Implementation Details
This section describes the CCU6 module interfaces with the clock control, port connections, interrupt control,
and address decoding.
18.11.1 Interfaces of the CCU6 Module
An overview of the CCU6 kernel I/O interface is shown in
The Bus Peripheral Interface (BPI) enables the CCU6 kernel to be attached to the 8-bit Bus. The BPI consists of
a clock control logic which gates the clock input to the kernel, and an address decoder for Special Function
Registers (SFRs) in the CCU6 kernel.
The interrupt lines of the CCU6 are connected to the CPU interrupt controller via the SCU. An interrupt pulse
can be generated at one of the four interrupt output lines SRCx (x=0 to 4) of the module. More than one CCU6
interrupt source can be connected to each CCU6 interrupt line.
The General Purpose IO (GPIO) Ports provide the interface from the CCU6 to the external world. Please refer to
for Port implementation details.
The CCU6 kernel is clocked on PCLK frequency where
f
CCU
=
f
PCLK
.
Debug Suspend of Timers
The timers of CCU6, T12 and T13, can be suspended immediately when OCDS enters Monitor Mode and has the
Debug-Suspend signal activated – provided the respective timer suspend bits, T12SUSP and T13SUSP (in SCU
SFR MODSUSP), are set. When suspended, the respective timer stops and its PWM outputs enabled for the trap
condition (
.TRPENx = 1) are set to respective passive levels (similar to TRAP state). In addition,
all CCU6 inputs are frozen. Refer to SCU
Flexible Peripheral Management (Kernel Clock Gating) of CCU6
When not in use, the CCU6 kernel may be disabled where the kernel clock input is gated. When the
.CCU_DIS request bit is set, both T12 and T13 are immediately stopped and PWM outputs
enabled for the trap condition (
.TRPENx = 1) are set to respective passive levels (similar to
TRAP state). In addition, all CCU6 inputs are frozen. Finally, the kernel clock input is gated. Refer to SCU
shows all interrupt and interface signals and GPIO interface associated with the CCU6 module
kernel.
Table 329 CCU6/T21CCU
Interconnection
CCU6 Input
T21CCU Output
T12HRD
T21CCU_CCTCON
.CCTST
T13HRD
T21CCU_CCTCON
.CCTST