User Manual
293
Rev. 1.1
2019-03-18
TLE984xQX
Microcontroller with LIN and Power Switches for Automotive Applications
Memory Control Unit
11.6
Memory Protection Unit (MPU)
The target of the memory protection scheme is to prevent unauthorized read out of critical data and user IPs
from the BootROM and NVM as well as to prevent accidental memory data modification.
The TLE984xQX protection scheme is divided in 2 parts interacting together.
The first memory protection scheme is firmware based and involves the blocking of all external access to the
device. More information on the firmware based protection scheme can be found in
The second memory protection scheme is hardware based; The “source” address, from which a memory read
instruction is fetched, and the “target” address, where addressed data are stored, are checked by the Memory
Protection Unit (MPU) to determine if the access must be blocked. Read instructions executed from an unsafe
memory address (e.g. RAM) that target the BootROM or NVM are blocked when the respective protection mode
is enabled. The hardware protection scheme is further described in Section
11.6.1
Memory Protection Regions
The TLE984xQX provides the following protection regions:
• BootROM region
• Customer BSL region BootROM
• Linear NVM region
• Non-Linear NVM region
The protection scheme implemented for the NVM memory module supports 3 different protection regions. On
each region the protection feature can be enabled or disabled independently according to the mechanism
and limitation further explained in the
shows the NVM memory regions supported by the protection mechanism.
Figure 47 NVM
Protection
Regions
11.6.2
Hardware Protection Mode
The hardware protection mode controls the access right on each memory or memory region available. Every
access to any memory is checked against the memory protection settings and accordingly executed or
rejected.
Customer BSL region
NVM Linearly mapped Region (code region )
NVM Non-Linearly Mapped Region (Data region )
