User Manual
448
Rev. 1.1
2019-03-18
TLE984xQX
Microcontroller with LIN and Power Switches for Automotive Applications
General Purpose Timer Units (GPT12)
Timers T2 and T4 in Counter Mode
Counter Mode for an auxiliary timer Tx is selected by setting bitfield TxM in register TxCON to 001
B
. In Counter
Mode, an auxiliary timer can be clocked either by a transition at its external input line TxIN, or by a transition
of timer T3’s toggle latch T3OTL. The event causing an increment or decrement of a timer can be a positive, a
negative, or both a positive and a negative transition at either the respective input pin or at the toggle latch.
Bitfield TxI in control register TxCON selects the triggering transition (see
Figure 96 Block Diagram of an Auxiliary Timer in Counter Mode
Note:
Only state transitions of T3OTL which are caused by the overflows/underflows of T3 will trigger the
counter function of T2/T4. Modifications of T3OTL via software will NOT trigger the counter function
of T2/T4.
For counter operation, pin TxIN must be configured as input. The maximum input frequency allowed in
Counter Mode depends on the selected prescaler value. To ensure that a transition of the count input signal
applied to TxIN is recognized correctly, its level must be held high or low for a minimum number of module
clock cycles before it changes. This information can be found in
Auxiliary
Timer Tx
Count
TxIRQ
MCB05397
MUX
Up/Down
0
1
TxEUD
=1
TxUD
TxUDE
MUX
TxRC
TxR
T3R
x = 2, 4
TxI
MUX
TxI.2
TxIN
T3
Toggle
Latch
0
1
0
1
Edge
Select
