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Smart Card Interface Mode (When SMIF in SCMR is 1)
Bit
Bit Name
Initial Value
R/W
Description
7 GM
0
R/W GSM
Mode
When this bit is set to 1, the SCI operates in GSM
mode. In GSM mode, the timing of the TEND
setting is advanced by 11.0 etu (Elementary Time
Unit: the time for transfer of one bit), and clock
output control mode addition is performed. For
details, refer to section 14.7.8, Clock Output
Control.
6
BLK
0
R/W
When this bit is set to 1, the SCI operates in block
transfer mode. For details on block transfer mode,
refer to section 14.7.3, Block Transfer Mode.
5
PE
0
R/W
Parity Enable (enabled only in asynchronous
mode)
When this bit is set to 1, the parity bit is added to
transmit data in transmission, and the parity bit is
checked in reception. In Smart Card interface
mode, this bit must be set to 1.
4 O/
E
0
R/W
Parity Mode (enabled only when the PE bit is 1 in
asynchronous mode)
0: Selects even parity.
1: Selects odd parity.
For details on setting this bit in Smart Card
interface mode, refer to section 14.7.2, Data
Format (Except for Block Transfer Mode).
3
2
BCP1
BCP0
0
0
R/W
R/W
Basic Clock Pulse 1 and 2
These bits specify the number of basic clock
periods in a 1-bit transfer interval on the Smart
Card interface.
00: 32 clock (S = 32)
01: 64 clock (S = 64)
10: 372 clock (S = 372)
11: 256 clock (S = 256)
For details, refer to section 14.7.4, Receive Data
Sampling Timing and Reception Margin in Smart
Card Interface Mode. S stands for the value of S
in BRR (see section 14.3.9, Bit Rate Register
(BRR)).
Summary of Contents for H8S/2627
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