Hitachi H8S/2627, Hardware Manual

Page: 529 / 605

Rev. 1.0, 09/02, page 493 of 568
Section 22 List of Registers
The register list gives information on the on-chip I/O register addresses, how the register bits are
configured, and the register states in each operating mode. The information is given as shown
below.
1. Register addresses (address order)
•
Registers are listed from the lower allocation addresses.
•
When the address is 16-bit wide, the address of the upper byte is given in the list.
•
Registers are classified by functional modules.
•
The access size is indicated.
2. Register bits
•
Bit configurations of the registers are described in the same order as the register addresses.
•
Reserved bits are indicated by

in the bit name column.
•
Bit number in the bit-name column indicates that the whole register is allocated as a counter or
for holding data.
•
When registers consist of 16 bits, bits are described from the MSB side.
3. Register states in each operating mode
•
Register states are described in the same order as the register addresses.
•
The register states described here are for the basic operating modes. If there is a specific reset
for an on-chip peripheral module, refer to the section on that on-chip peripheral module.