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CHAPTER 3 CPU
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Temporary Accumulator (T)
The temporary accumulator is an auxiliary 16-bit arithmetic operation register. It handles arithmetic
operations using data in the accumulator (A). When arithmetic operations in the accumulator (A) are
handled in word units (16 bits), data in the temporary accumulator is handled in word units. Otherwise, it is
handled in byte units (8 bits). When arithmetic operations are handled in byte units, only the lower 8 bits
(TL) in the temporary accumulator are used; the upper 8 bits (TH) are not used.
When an MOV instruction is used to transfer data into the accumulator (A), data stored in the accumulator
is automatically transferred to the temporary accumulator before it is transferred. For data transfer in byte
units, the upper 8 bits of the temporary accumulator (TH) does not change. The initial value of the
temporary accumulator specified after the reset operation is undefined.
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Index register (IX)
The index register is a 16-bit register that stores an index address. The index register is used together with a
1-byte offset (-128 to +127). It generates a memory address for accessing data by adding a sign-extended
offset to the index address. The initial value of the index register specified after the reset operation is
undefined.
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Extra-pointer (EP)
The extra-pointer is a 16-bit register. Data in the extra-pointer is handled as the memory address for
accessing data. The initial value of the extra-pointer specified after the reset operation is undefined.
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Stack pointer (SP)
The stack pointer is a 16-bit register that stores an address that is used to call an interrupt or subroutine, or
to which a stack/recovery instruction makes a reference. While a program is being executed, the value of
the stack pointer indicates the address of the latest data put in the stack. The initial value of the stack
pointer specified after the reset operation is undefined.
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Program status (PS) register
The program status is a 16-bit control register. The upper 8 bits of the program status register is the register
bank pointer (RP) used to indicate the address of a general-purpose register bank.
The lower 8 bits are the condition code register (CCR) that composes flags for indicating the CPU status.
Because these 8-bit registers comprise the program status register, they cannot be accessed. (Only
instructions MOVW A, PS and MOVW PS, A access the program status register.)
Note:
For details on how to use the dedicated register, see the F
2
MC-8L MB89600 Series Programming
Manual.
Summary of Contents for F2MC-8L F202RA
Page 2: ......
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Page 32: ...16 CHAPTER 1 OVERVIEW ...
Page 90: ...74 CHAPTER 3 CPU ...
Page 142: ...126 CHAPTER 5 TIME BASE TIMER POPW A RETI ENDS END ...
Page 150: ...134 CHAPTER 6 WATCHDOG TIMER ...
Page 176: ...160 CHAPTER 7 8 BIT PWM TIMER ...
Page 220: ...204 CHAPTER 8 8 16 BIT CAPTURE TIMER COUNTER ...
Page 240: ...224 CHAPTER 9 12 BIT PPG TIMER ...
Page 274: ...258 CHAPTER 11 EXTERNAL INTERRUPT CIRCUIT 2 LEVEL ...
Page 362: ...346 CHAPTER 15 BUZZER OUTPUT ...
Page 390: ...374 CHAPTER 17 FLASH MEMORY ...
Page 419: ...403 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 434: ...418 INDEX ...
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