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CHAPTER 10 EXTERNAL INTERRUPT CIRCUIT 1 (EDGE)
10.2
Configuration of External Interrupt Circuit 1
External interrupt circuit 1 comprises the following two blocks:
• Edge detecting circuits (0 to 2)
• External interrupt control 1 registers 1, 2 (EIC1, EIC2)
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Block Diagram of External Interrupt Circuit 1
Figure 10.2-1 Block Diagram of External Interrupt Circuit 1 (EIC1, EIC2)
EIR1
SL11
SL10
EIE1
EIR0
SL01
SL00
EIE0
EIR2
SL21
SL20
EIE2
P34/TO/INT10
P35/INT11
10
01
11
10
01
11
P36/INT12
10
01
11
Pin
Edge detecting circuit 1
Pin
Selector
Edge detecting circuit 0
Selector
External interrupt 1
control register 1
(EIC1)
Interrupt request
(IRQ0)
Interrupt request
(IRQ1)
Internal data bus
Edge detecting circuit 2
Pin
Selector
External interrupt 1
control register 2
(EIC2)
Interrupt request (IRQ2)
Summary of Contents for F2MC-8L F202RA
Page 2: ......
Page 4: ......
Page 32: ...16 CHAPTER 1 OVERVIEW ...
Page 90: ...74 CHAPTER 3 CPU ...
Page 142: ...126 CHAPTER 5 TIME BASE TIMER POPW A RETI ENDS END ...
Page 150: ...134 CHAPTER 6 WATCHDOG TIMER ...
Page 176: ...160 CHAPTER 7 8 BIT PWM TIMER ...
Page 220: ...204 CHAPTER 8 8 16 BIT CAPTURE TIMER COUNTER ...
Page 240: ...224 CHAPTER 9 12 BIT PPG TIMER ...
Page 274: ...258 CHAPTER 11 EXTERNAL INTERRUPT CIRCUIT 2 LEVEL ...
Page 362: ...346 CHAPTER 15 BUZZER OUTPUT ...
Page 390: ...374 CHAPTER 17 FLASH MEMORY ...
Page 419: ...403 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 434: ...418 INDEX ...
Page 436: ......