335
CHAPTER 14 8-BIT SERIAL I/O
Figure 14.10-2 Bidirectional Serial I/O Operation
(
SS
T=0)
(
SS
T=1)
S
IO-A
YE
S
(
SS
T=0)
END
YE
S
(
SS
T=0)
S
IO-A
NO
NO
S
IO-B
NO
YE
S
S
IO-B
S
TART
S
TART
(
SS
T=0)
(
SS
T=1)
NO
YE
S
S
top
S
IO-A oper
a
tion
S
et
S
I pin to
s
eri
a
l d
a
t
a
inp
u
t (inp
u
t port)
S
et
S
CK pin to
s
hift clock
o
u
tp
u
t
-
S
et d
a
t
a
tr
a
n
s
fer (
s
hift
clock) direction
-
-
S
et
S
O pin to
s
eri
a
l d
a
t
a
o
u
tp
u
t
-
S
elect intern
a
l
s
hift clock
I
s
S
IO-B in
s
eri
a
l tr
a
n
s
fer
a
llow
a
nce
s
t
a
te?
(*1)
Tr
a
n
s
fer
a
llow
a
nce
s
t
a
te
S
et o
u
tp
u
t d
a
t
a
S
t
a
rt
s
eri
a
l I/O tr
a
n
s
fer
(*2)
S
eri
a
l d
a
t
a
tr
a
n
s
fer
S
eri
a
l d
a
t
a
o
u
tp
u
t vi
a
S
IO-A
S
im
u
lt
a
neo
us
d
a
t
a
inp
u
t vi
a
S
IO-B
End of
8
-
b
it tr
a
n
s
fer?
(*
3
)
Re
a
d inp
u
t d
a
t
a
I
s
next d
a
t
a
a
v
a
il
ab
le?
S
top
S
IO-B oper
a
tion
S
et
S
I pin to
s
eri
a
l d
a
t
a
inp
u
t (inp
u
t port)
-
-
-
-
S
et
S
CK pin to
s
hift clock
inp
u
t
S
et
S
O pin to
s
eri
a
l d
a
t
a
o
u
tp
u
t
S
elect extern
a
l
s
hift clock
S
elect
sa
me d
a
t
a
tr
a
n
s
fer
(
s
hift) direction
as
S
IO-A
Allow
s
eri
a
l d
a
t
a
tr
a
n
s
fer
S
et o
u
tp
u
t d
a
t
a
S
eri
a
l d
a
t
a
tr
a
n
s
fer
End of
8
-
b
it tr
a
n
s
fer?
(*
3
)
Re
a
d inp
u
t d
a
t
a
The
SS
T
b
it i
s
the
s
eri
a
l I/O tr
a
n
s
fer
s
t
a
rt
b
it of the
s
eri
a
l mode
regi
s
ter (
S
MR).
SS
T:
*1
*2
*
3
If only the
S
O,
S
I,
a
nd
S
CK pin
s
a
re connected, there i
s
no method for directly checking
whether
S
IO-B i
s
in the
s
eri
a
l tr
a
n
s
fer
a
llow
a
nce
s
t
a
te. For thi
s
re
as
on,
a
timer, etc., m
us
t
b
e
us
ed to monitor the w
a
it time period th
a
t l
as
t
s
u
ntil
S
IO-B i
s
a
llowed for tr
a
n
s
fer vi
a
s
oftw
a
re.
If
S
IO-B i
s
not
a
llowed for
s
eri
a
l I/O tr
a
n
s
fer, d
a
t
a
c
a
nnot
b
e tr
a
n
s
ferred correctly even if
S
IO-A
s
t
a
rt
s
s
eri
a
l I/O tr
a
n
s
fer.
When
8
-
b
it d
a
t
a
tr
a
n
s
fer termin
a
te
s
,
a
interr
u
pt re
qu
e
s
t occ
u
r
s
.
Summary of Contents for F2MC-8L F202RA
Page 2: ......
Page 4: ......
Page 32: ...16 CHAPTER 1 OVERVIEW ...
Page 90: ...74 CHAPTER 3 CPU ...
Page 142: ...126 CHAPTER 5 TIME BASE TIMER POPW A RETI ENDS END ...
Page 150: ...134 CHAPTER 6 WATCHDOG TIMER ...
Page 176: ...160 CHAPTER 7 8 BIT PWM TIMER ...
Page 220: ...204 CHAPTER 8 8 16 BIT CAPTURE TIMER COUNTER ...
Page 240: ...224 CHAPTER 9 12 BIT PPG TIMER ...
Page 274: ...258 CHAPTER 11 EXTERNAL INTERRUPT CIRCUIT 2 LEVEL ...
Page 362: ...346 CHAPTER 15 BUZZER OUTPUT ...
Page 390: ...374 CHAPTER 17 FLASH MEMORY ...
Page 419: ...403 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 434: ...418 INDEX ...
Page 436: ......