Fujitsu F2MC-8L F202RA, Hardware Manual

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CHAPTER 9 12-BIT PPG TIMER
9.4.2 12-bit PPG Control Register 2 (RCR22)
The 12-bit PPG control register 2 comprises bits for setting the "H" width of 12-bit PPG
pulse waveforms.
■
12-bit PPG Control Register 2 (RCR22)
Figure 9.4-3 12-bit PPG Control Register 2 (RCR22)
HSC11 to HSC6
XXXXXX
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
0015
H
HSC11 HSC10 HSC9 HSC8 HSC7
HSC6 --000000
B
R/W R/W R/W R/W R/W R/W
R/W
:
Readable/Writable
: Unused
Address
Initial value
"H" width setting bits
Compare value for the "H" width of 12-bit PPG outputs
Table 9.4-2 Explanation of Functions of Each Bit in 12-bit PPG Control Register 2 (RCR22)
Bit name Function
bit7,
bit6
Unused bits
• Bit value is undefined when being read.
• Written value does not affect other operations.
bit5
to
bit0
HSC11 to HSC6:
"H" width setting
bits
These bits are used to set the number of counts corresponding to the "H" width of
12-bit PPG timer outputs (the compare value for the "H" width), and the contents of
these bits and the HSC0 to HSC5 bits of the RCR21 register are compared with a
count by the counter.