Fujitsu F2MC-8L F202RA, Hardware Manual

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CHAPTER 9 12-BIT PPG TIMER
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Count clock selector
This selector circuit selects one of four types of internal count clocks as the count-up clock for a 12-bit
counter.
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12-bit counter
The 12-bit counter executes a count-up operation based on the count clock selected by the count clock
selector.
This counter may be cleared according to the value of the output enable bit of the RCR23 register
(RCR23:RCEN=0).
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Comparator
The comparator maintains outputs at "H" until a count by the 12-bit counter has been synchronized with the
value of the register containing the compare value for "H" width. The comparator then maintains outputs at
"L" until a count by the counter is synchronized with the value of the register containing the set cycle
period. At this time, the 12-bit counter is cleared and restarts to count from "00
H
".
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12-bit PPG control registers 1 (RCR21) and 2 (RCR22)
These registers comprise bits for count clock selection and bits for setting a compare value for the "H"
width.
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12-bit PPG control registers 3 (RCR23) and 4 (RCR24)
These registers comprise a bit for specifying whether to enable or disable the 12-bit PPG output and bits for
setting a compare value for the cycle period.