ABB REC 561, User Manual

Page: 163 / 643

ABB Network Partner AB
Configurable logic
Version 1.0-00
1MRK 580 161-XEN
Page 4 - 28
If you need more timers than available in the terminals, you can use pulse
timers with AND or OR logics. Fig. 5 shows an application example of
how to realize a timer delayed on pick-up. Fig. 6 shows the realization of
a timer delayed on drop-out. Note that the resolution of the setting time
must be 0.2 s, if the connected logic has a cycle time of 200 ms.
Fig. 5 Realization example of a timer delayed on pick-up
Fig. 6 Realization example of a timer delayed on drop-out
2.5 Pulse
The configuration logic pulse timer TP (Fig. 7) has a settable length of a
pulse between 0.01 s and 50.00 s in steps of 0.01 s. The input signal for
each pulse timer has the designation TPnn-INPUT, where nn runs from 01
to 10 for REL 531 and to 50 for REC 561 and presents the serial number
of the logic block. Each pulse timer has one output, designated by TPnn-
OUT. The pulse timer is not retriggable, that is, it can be restarted first
after that the time T has elapsed.
Fig. 7 Block diagram of the Pulse function
2.6 Exclusive OR (XOR)
The configuration logic exclusive OR (XOR) (Fig. 8) has two inputs, des-
ignated XOnn-INPUTm, where nn runs from 01 to 39 for REC 561 and
presents the serial number of the block, and m presents the serial number
INPUT1
INPUT2
INPUT3
INPUT4N
AND
Pulse
INPUT
T OUT
FIXED-ON
OUT
NOUT
0-50.0 s
(X80161-5)
INPUT1
INPUT2
INPUT3
INPUT4
OR
Pulse
INPUT
T
OUT
FIXED-OFF
OUT
NOUT
0-50.0 s
INPUT5
INPUT6
INV
INPUT OUT
(X80161-6)
Time delay 0.01-50.00 s
INPUT
T
OUT
TPnn
(X80161-7)