Samsung SC32442B54, Руководство пользователя

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K5D2G13ACM-D075
Revision 1.0
December 2006
70
MCP MEMORY
C. FUNCTION TRUTH TABLE (TABLE 2)
(ABI = All Banks Idle, RA = Row Address)
Note:
6) CKE low to high transition is asynchronous.
7) CKE low to high transition is asynchronous if internal clock is restarted.
A minimum setup time 1CLK + t
SS
must be satisfied before any command except exit.
8) Power down and self refresh can be entered only from the all banks idle state.
9) Must be a legal command.
Current
State
CKE
(n-1) CKE
n
CS RAS CAS WE Address Action Note
Self
Refresh
H X X X X X X Exit Self Refresh --> Idle after ts
RFX
(ABI)
L H H X X X X Exit Self Refresh --> Idle after ts
RFX
(ABI) 6
L H L H H H X Exit Self Refresh --> Idle after ts
RFX
(ABI) 6
L H L H H L X ILLEGAL
L H L H L X X ILLEGAL
L H L L X X X ILLEGAL
L L X X X X X NOP (Maintain Self Refresh)
All
Banks
Precharge
Power
Down
H X X X X X X INVALID
L H H X X X X Exit Power Down --> ABI
L H L H H H X Exit Power Down --> ABI 7
L H L H H L X ILLEGAL 7
L H L H L X X ILLEGAL
L H L L X X X ILLEGAL
L L X X X X X NOP (Maintain Low Power Mode)
All
Banks
Idle
H H X X X X X Refer to Table 1
H L H X X X X Enter Power Down
H L L H H H X Enter Power Down 8
H L L H H L X ILLEGAL 8
H L L H L X X ILLEGAL
H L L L H H RA Row (& Bank) Active
H L L L L H X Enter Self Refresh 8
H L L L L L OP Code Mode Register Access
L L X X X X X NOP
Any State
other than
Listed
above
H H X X X X X Refer to Operations in Table 1
H L X X X X X Begin Clock Suspend next cycle 9
L H X X X X X Exit Clock Suspend next cycle 9
L L X X X X X Maintain Clock Suspend