Samsung SC32442B54, Руководство пользователя

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K5D2G13ACM-D075
Revision 1.0
December 2006
41
MCP MEMORY
Figure 18. Read ID Operation
CE
CLE
I/O
X
ALE
RE
WE
90h 00h
Address. 1cycle
Maker code
Device code
t
CEA
t
AR
t
REA
Read ID
The device contains a product identification mode, initiated by writing 90h to the command register, followed by an address input of
00h. Five read cycles sequentially output the manufacturer code(ECh), and the device code and 3rd, 4th, 5th cycle ID respectively.
The command register remains in Read ID mode until further commands are issued to it. Figure 18 shows the operation sequence.
Figure 19. RESET Operation
RESET
The device offers a reset feature, executed by writing FFh to the command register. When the device is in Busy state during random
read, program or erase mode, the reset operation will abort these operations. The contents of memory cells being altered are no
longer valid, as the data will be partially programmed or erased. The command register is cleared to wait for the next command, and
the Status Register is cleared to value C0h when WP is high. If the device is already in reset state a new reset command will be
accepted by the command register. The R/B pin changes to low for tRST after the Reset command is written. Refer to Figure 19
below.
FFh
I/O
X
R/B
t
RST
t
WHR
t
CLR
Device
4th Cyc.
Code
ECh
3rd Cyc. 5th Cyc.
Table 5. Device Status
After Power-up After Reset
Operation mode 00h Command is latched Waiting for next command
Device Device Code (2nd Cycle) 3rd Cycle 4th Cycle 5th Cycle
1.8V AAh 00h 15h 44h