Samsung SC32442B54, Руководство пользователя

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PRODUCT OVERVIEW SC32442B RISC MICROPROCESSOR
1-28
Table 1-3. SC32442B Signal Descriptions (Sheet 6 of 6)
Signal Input/Output Description
Power
VDDALIVE P SC32442B reset block and port status register VDD.
It should be always supplied whether in normal mode or in Sleep mode.
VDDIARM P SC32442B core logic VDD for ARM core.
VDDI P SC32442B core logic VDD for Internal block.
VSSCOM P SC32442B core logic VSS
VDDA_MPLL P SC32442B MPLL analog and digital VDD.
VSSA_MPLL P SC32442B MPLL analog and digital VSS.
VDDOP,OP1,
OP2, OP3
P SC32442B I/O port VDD 3.3V/2.5V
VDDMOP P SC32442B Memory I/O VDD
VSSOP P SC32442B I/O port VSS
VDDRTC P RTC VDD (3.0V, Input range: 1.8 ~ 3.6V)
This pin must be connected to power properly if RTC isn't used.
VDDA_UPLL P SC32442B UPLL analog and digital VDD
VSSA_UPLL P SC32442B UPLL analog and digital VSS
VDDA_ADC P SC32442B ADC VDD(3.3V)
VSSA_ADC P SC32442B ADC VSS
VCC_NF P NAND VDD in SC32442B
VSS_NF P NAND VSS in SC32442B
VDD_SDRAM P mSDRAM VDD Core in SC32442B
VSS_SDRAM P mSDRAM VSS Core in SC32442B
VDDQ_SDRAM P mSDRAM VDD IO in SC32442B
VSSQ_SDRAM P mSDRAM VSS IO in SC32442B
/CS O
mSDRAM chip select in SC32442B,,This pin should be connected nGCS6,
externally
/WP I
NAND write protect in SC32442B. The WP pin provides inadvertent write/erase
protection during power transitions. The internal high voltage generator is reset
when the WP pin is active low.
/CE O NAND chip select in SC32442B
The CE input is the device selection control. When the device is in the BUSY
state, CE high is ignored, and the device does not return to standby mode. This
pin should be connected nFCE, externally.
NOTE:
1. I/O means Input/Output.
2. AI/AO means analog input/analog output.
3. ST means schmitt-trigger.
4. P means power.