Samsung SC32442B54, Руководство пользователя

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K5D2G13ACM-D075
Revision 1.0
December 2006
66
MCP MEMORY
t
SS
t
SS
Auto Refresh
Command
PRE
t
RP
t
RC(min)
/t
ARFC(min)
Auto
CKE = High
Refresh
CMD
An auto refresh command is issued by having CS, RAS and CAS held low with CKE and WE high at the rising edge of the
clock(CLK). All banks must be precharged and idle for t
RP
(min) before the auto refresh command is applied. Once this cycle has
started, no control of the external address pins is required because of the internal address counter. When the refresh cycle has com-
pleted, all banks will be in the idle state. A delay between the auto refresh command and the next activate command or subsequent
auto refresh command must be greater than or equal to the t
RC
(min) for 2.5V/3.0V or t
ARFC
(min) for 1.8V.
∼ ∼
∼ ∼
∼ ∼
CLK
A Self Refresh command is defined by having CS, RAS, CAS and CKE held low with WE high at the rising edge of the clock. Once
the self Refresh command is initiated, CKE must be held low to keep the device in Self Refresh mode. After 1 clock cycle from the self
refresh command, all of the external control signals including system clock(CLK) can be disabled except CKE. The clock is internally
disabled during Self Refresh operation to reduce power. To exit the Self Refresh mode, supply stable clock input before returning CKE
high, assert deselect or NOP command and then assert CKE high.
Self Refresh
Command
CKE
Stable Clock
t
SS
NOP
Self
Refresh
CLK
t
RC(min)
/t
SRFX(min)
t
SS
∼∼
∼∼
∼∼
∼∼
∼∼
∼∼
∼∼
ACT
10. Clock Suspend Exit & Power Down Exit
11. Auto Refresh & Self Refresh
1) Clock Suspend (=Active Power Down) Exit 2) Power Down (=Precharge Power Down) Exit
CLK
CKE
Internal
CLK
CMD
RD
CLK
CKE
Internal
CLK
CMD
NOP ACT
NOP NOP NOP NOP NOP NOP NOP NOP NOP
∼∼ NOP NOP NOP NOP NOP