SC32442B RISC MICROPROCESSOR
LCD CONTROLLER
15-33
FRAME BUFFER START ADDRESS 1 REGISTER
Register Address R/W
Description
Reset
Value
LCDSADDR1 0X4D000014 R/W
STN/TFT
: Frame buffer start address 1 register
0x00000000
LCDSADDR1
Bit
Description
Initial State
LCDBANK
[29:21]
These bits indicate A[30:22] of the bank location for the video buffer
in the system memory. LCDBANK value cannot be changed even
when moving the view port. LCD frame buffer should be within
aligned 4MB region, which ensures that LCDBANK value will not be
changed when moving the view port. So, care should be taken to
use the malloc() function.
0x00
LCDBASEU
[20:0]
For dual-scan LCD : These bits indicate A[21:1] of the start address
of the upper address counter, which is for the upper frame memory
of dual scan LCD or the frame memory of single scan LCD.
For single-scan LCD : These bits indicate A[21:1] of the start
address of the LCD frame buffer.
0x000000
FRAME Buffer Start Address 2 Register
Register Address R/W
Description
Reset
Value
LCDSADDR2 0X4D000018 R/W
STN/TFT
: Frame buffer start address 2 register
0x00000000
LCDSADDR2 Bit
Description
Initial
State
LCDBASEL
[20:0]
For dual-scan LCD: These bits indicate A[21:1] of the start address
of the lower address counter, which is used for the lower frame
memory of dual scan LCD.
For single scan LCD: These bits indicate A[21:1] of the end address
of the LCD frame buffer.
LCDBASEL = ((the frame end address) >>1) + 1
= LC
(PAOFFSIZE) x (1)
0x0000
Note
Users can change the LCDBASEU and LCDBASEL values for scrolling while the LCD controller is turned on.
But, users must not change the value of the LCDBASEU and LCDBASEL registers at the end of FRAME by referring to the
LINECNT field in LCDCON1 register, for the LCD FIFO fetches the next frame data prior to the change in the
frame.
So, if you change the frame, the pre-fetched FIFO data will be obsolete and LCD controller will display an incorrect screen. To
check the LINECNT, interrupts should be masked. If any interrupt is executed just after reading LINECNT, the read LINECNT
value may be obsolete because of the execution time of Interrupt Service Routine (ISR).
Содержание SC32442B54
Страница 1: ...SC32442B54 USER S MANUAL Revision 1 0 ...
Страница 43: ...PRODUCT OVERVIEW SC32442B RISC MICROPROCESSOR 1 42 NOTES ...
Страница 59: ...PROGRAMMER S MODEL SC32442B RISC MICROPROCESSOR 2 16 NOTES ...
Страница 123: ...ARM INSTRUCTION SET SC32442B RISC MICROPROCESSOR 3 64 NOTES ...
Страница 167: ...THUMB INSTRUCTION SET SC32442B RISC MICROPROCESSOR 4 44 NOTES ...
Страница 187: ...MEMORY CONTROLLER SC32442B RISC MICROPROCESSOR 5 20 NOTES ...
Страница 250: ...DMA SC32442B RISC MICROPROCESSOR 8 14 NOTES ...
Страница 308: ...PWM TIMER SC32442B RISC MICROPROCESSOR 10 20 NOTES ...
Страница 330: ...UART SC32442B RISC MICROPROCESSOR 11 22 NOTES ...
Страница 417: ...SC32442B RISC MICROPROCESSOR LCD CONTROLLER 15 45 NOTES ...
Страница 427: ...ADC AND TOUCH SCREEN INTERFACE SC32442B RISC MICROPROCESSOR 16 10 NOTES ...
Страница 511: ...BUS PRIORITIES SC32442B RISC MICROPROCESSOR 24 2 NOTES ...
Страница 562: ...K5D2G13ACM D075 Revision 1 0 December 2006 7 MCP MEMORY 2Gb 256Mb x8 NAND Flash Memory A Die ...
Страница 599: ...K5D2G13ACM D075 Revision 1 0 December 2006 44 MCP MEMORY 512Mb 16Mb x32 Mobile SDRAM C Die ...