RL78/G1P
CHAPTER 7 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER
R01UH0895EJ0100 Rev.1.00
228
Nov 29, 2019
Figure 7-1. Block Diagram of Clock Output/Buzzer Output Controller
f
MAIN
PCLOE0
0
0
0
PCLOE0
5
3
PCLBUZ1
Note
/P15
PCLBUZ0
Note
/TI03/TO03/INTP4/P12
Clock/buzzer
controller
Prescaler
Internal bus
0
Clock output select register 0 (CKS0)
CCS02 CCS01 CCS00
Output latch
(P15)
PM15
PM12
Output latch
(P12)
PCLOE1
0
0
0
0
Clock output select register 1 (CKS1)
CCS12 CCS11 CCS10
Internal bus
Clock/buzzer
controller
PCLOE1
f
MAIN
to f
MAIN
/2
4
f
MAIN
/2
11
to f
MAIN
/2
13
f
MAIN
/2
11
to f
MAIN
/2
13
f
MAIN
to f
MAIN
/2
4
Selector
Selector
Note
For output frequencies available from PCLBUZ0 and PCLBUZ1, see
27.4 AC Characteristics
.