UM10208_2
© NXP B.V. 2007. All rights reserved.
User manual
Rev. 02 — 1 June 2007
332 of 362
NXP Semiconductors
UM10208
Chapter 26: LPC2800 GPIO
Table 366. Pin description
Port
Pin(s)
Description
P0 (32 pins)
D15 / P0.15 to D0 /
P0.0
These GPIOs are shared with the 16 external bus data
lines.
A15 / P0.31 to A0 /
P0.16
These GPIOs are shared with the lower 16 bits of the
external bus address.
P1 (20 pins)
A20 / P1.4 to A16 /
P1.0
These GPIOs are shared with the upper 5 bits of the
external bus address.
STCS2 / P1.7 to
STCS0 / P1.5
These GPIOs are shared with the static memory chip
select outputs.
DYCS / P1.8
This GPIO is shared with the dynamic chip select
output.
CKE / P1.9
This GPIO is shared with SDRAM clock enable.
DQM1 / P1.11 to DQM0
/ P1.10
These GPIOs are shared with the SDRAM data mask
outputs.
BLS1 / P1.13 to BLS0 /
P1.12
These GPIOs are shared with the static memory byte
lane selects.
MLCKO / P1.14
This GPIO is shared with the external bus clock
output.
WE / P1.15
This GPIO is shared with the write enable.
CAS / P1.16
This GPIO is shared with the column address strobe.
RAS / P1.17
This GPIO is shared with the row address strobe.
OE / P1.18
This GPIO is shared with the static memory output
enable.
RPO / P1.19
This GPIO is shared with the SyncFlash reset/power
down signal.
P2 (4 pins)
MODE1 / P2.3 to
MODE0 / P2.2
These GPIOs are shared with the boot mode select
inputs.
P2.1 to P2.0
These GPIOs are dedicated and are not shared with
any peripheral function.
P3 (6 pins)
DATO / P3.6
This GPIO is shared with the DAO data output.
BCKO / P3.5
This GPIO is shared with the DAO bit clock output.
DCLKO / P3.3
This GPIO is shared with the DAO 256x clock.
WSI / P3.2
This GPIO is shared with the DAI word select input.
BCKI / P3.1
This GPIO is shared with the DAI bit clock input.
DATI / P3.0
This GPIO is shared with the DAI data input.
P4 (12 pins)
LD7 / P4.11 to LD0 /
P4.4
These GPIOs are shared with the LCD data bus.
LER / P4.3
This GPIO is shared with the LCD read strobe.
LRW / P4.2
This GPIO is shared with the LCD read/write signal.
LRS / P4.1
This GPIO is shared with the LCD register select
signal.
LCS / P4.0
This GPIO is shared with the LCD chip select output.