UM10208_2
© NXP B.V. 2007. All rights reserved.
User manual
Rev. 02 — 1 June 2007
6 of 362
NXP Semiconductors
UM10208
Chapter 1: LPC2800 Introductory information
9.
Block diagram
(1) LPC2888 only
Fig 1.
LPC288x block diagram
MULTI-LAYER AHB
AIN[4:0]
Px.y
WATCHDOG
TIMER
SD/MMC CARD
INTERFACE
GENERAL
PURPOSE I/O
SYSTEM
CONTROL
EVENT
ROUTER
register
interface
DC-TO-DC
CONVERTER
START,
STOP
SCL, SDA
MCLK
MD[3:0], MCMD
DATI
BCKI, WSI
AOUTL,
AOUTR
AINL, AINR
DATO
BCKO, DCLKO,
WSO
+1.5 V
or +5 V
3.3 V,
1.8 V
XTALI
XTALO
X32I
X32O
CLOCK
GENERATION
UNIT
OSCILLATOR
AND PLLs
ARM7TDMI-S
JTAG DEBUG
INTERFACE
8 kB CACHE
JT
A
G_TRST
JT
A
G_TMS
JT
A
G_TCK
JT
A
G_TDI
JT
A
G_TDO
JT
A
G_SEL
FLASH
INTERFACE
1 MB
FLASH
(1)
SRAM
INTERFACE
64 kB
SRAM
ROM
INTERFACE
BOOT
ROM
REAL-TIME
CLOCK
OSCILLATOR
FIFO
FIFO
I
2
S-BUS
INPUT
FIFO
I
2
S-BUS
OUTPUT
DUAL ANALOG
INPUT
FIFO
DUAL ANALOG
OUTPUT
EXTERNAL
MEMORY
CONTROLLER
A[20:0],
D[15:0],
etc.
VECTORED
INTERRUPT
CONTROLLER
HS USB
WITH DMA
DP, DM, VBUS,
RREF, CONNECT
LPC2880/2888
AHB TO APB
BRIDGE 0
AHB TO APB
BRIDGE 3
AHB TO APB
BRIDGE 1
AHB TO APB
BRIDGE 2
GP DMA
CONTROLLER
10-BIT A/D
CONVERTER
UART WITH
IrDA
TXD, RTS
RXD, CTS
LCD
INTERFACE
LCD bus
I
2
C-BUS
INTERFACE
32-BIT
TIMER 0
32-BIT
TIMER 1
002aac296