NXP Semiconductors LPC2880, Руководство пользователя

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UM10208_2 © NXP B.V. 2007. All rights reserved.
User manual Rev. 02 — 1 June 2007 252 of 362
1. Features
•
I
2
S input via Digital Analog In (DAI) module
•
Digital values 16 to 24 bits
•
Streaming Analog In (SAI) module provides FIFO buffering
•
DMA or processor transfer
2. Description
The LPC288x can input a single- or dual-channel audio stream from an Inter-IC Sound
(I
2
S) bus. The I
2
S input module is called the DAI. It can capture serial data in standard
Philips IIS format, or in right-justified 16-, 18-, 20-, or 24-bit format.
Because the ARM7 microcontroller services a variety of tasks in an interleaved fashion
that involves worst-case event-arrival considerations, a FIFO buffer called an SAI is
included to smooth the transfer of the digital values from the DAI to memory. This transfer
can be performed by the processor or by GPDMA channel(s).
3. DAI pins
The DAI has three dedicated pins, as shown in Table 19–284 .
4. DAI registers
Table 19–285 lists the LPC288x registers associated with I
2
S input. Subsequent sections
describe the registers in greater detail.
UM10208
Chapter 19: I
2
S input module (DAI)
Rev. 02 — 1 June 2007 User manual
Table 284. DAI pins
Name Type Description
BCKI / P3[1] I/O Bit clock
DATI / P3[0] I Data from remote device
WSI / P3[2] I/O Word select. This signal differentiates L data from R data.
Table 285. DAI registers
Name Address Description Access Reset
value
SIOCR 0x8020 0384 Stream I/O Configuration Register. This register
is shared with the Dual ADC, I
2
S out, and Dual
DAC blocks, and includes an output-enable bit that
must be set if the DAI is to be used in Master
mode.
R/W 0x180
I2S_FMT 0x8020 0380 I
2
S Format Register. This register is shared with
the DAO block. For the DAI, it controls how data is
captured from the DATI pin.
R/W 0xDD