UM10208_2
© NXP B.V. 2007. All rights reserved.
User manual
Rev. 02 — 1 June 2007
158 of 362
NXP Semiconductors
UM10208
Chapter 14: LPC2800 UART
[1]
Values “0011”, “0101”, “0111”, “1000”, “1001”, “1010”, “1011”,”1101”,”1110”,”1111” are reserved.
[2]
For details see
Section 14–3.12 “Line Status Register (LSR - 0x8010 1014, Read Only)”
[3]
For details see
Section 14–3.1 “Receiver Buffer Register (RBR - 0x8010 1000 when DLAB=0, Read Only)”
[4]
For details see
Section 14–3.6 “Interrupt Identification Register (IIR - 0x8010 1008, Read Only)”
and
Section 14–3.2 “Transmit Holding Register (THR - 0x8010 1000 when DLAB=0, Write Only)”
The THRE interrupt (IIR[3:1]=001) is activated when the THR FIFO is empty, provided that
certain initialization conditions have been met. These initialization conditions are intended
to give the THR FIFO a chance to fill up with data to eliminate many THRE interrupts from
occurring at system start-up. The initialization conditions implement a one character delay
minus the stop bit, whenever THRE=1 and there have not been at least two characters in
the THR at one time since the last THRE=1 event. This delay is provided to give the CPU
time to write data to the THR without a THRE interrupt to decode and service. A THRE
interrupt is set immediately if the THR FIFO has held two or more characters at one time
and currently, the THR is empty. The THRE interrupt is reset when the THR is written or
IIR is read and THRE is the highest interrupt (IIR[3:1]=001).
Table 173. Interrupt identification and priorities
IIR[3:0]
value
Priority Interrupt type
Interrupt source
Interrupt reset
0001
-
None
None
-
0110
Highest RX Line Status
/ Error
OE
or PE
or FE
LSR Read
0100
Second RX Data
Available
Rx data available, or trigger level
reached in FIFO with FCR0=1.
RBR Read
or
the Rx FIFO
drops below
trigger level
1100
Second Character
Time-out
indication
Minimum of one character in the Rx
FIFO and no character input or removed
during a time period depending on how
many characters are in FIFO and what
the trigger level is set at (3.5 to 4.5
character times).
The exact time will be:
[(word length) X 7 - 2] X 8 + [(trigger level
- number of characters) X 8 + 1] RCLKs
RBR Read
0010
Third
THRE
THRE
IIR Read (if
source of
interrupt) or
THR write
0000
Lowest
Modem Status
Enabled transition on CTS
MSR Read