Hioki Power HiTester 3193, Инструкция по эксплуатации

Страница: 146 / 310

128
────────────────────────────────────────────────────
12.3 Interface Outline
────────────────────────────────────────────────────
Event status register (ESR1 (ch))
Bit 7
Unused
Bit 6
Unused
Bit 5
OA
OVER-A
Current crest factor out of range
Bit 4
OV
OVER-V
Voltage crest factor out of range
Bit 3
Unused
Bit 2
HW
HIGH-W
Power input out of range
Bit 1
HA
HIGH-A
Current input out of range
Bit 0
HV
HIGH-V
Voltage input out of range
(7) Event status registers 11 to 26 (ESR11 to 26)
These registers are event status registers indicating out-of-range inputs for
input unit channels 1 to 6 and harmonic analysis board input channels 1 to
6. A summary of these registers is reflected in ESR1 and ESR2.
The following commands are used for reading the event status register, and
for setting the event status enable register and for reading it.
Reading event status register (ch) *ESR(ch)?
Setting event status enable register (ch) *ESE(ch)
Reading event status enable reister (ch) *ESE(ch)?