120
────────────────────────────────────────────────────
12.3 Interface Outline
────────────────────────────────────────────────────
12.3.11 Status Model
Generation of service
request (SRQ)
Represents standard event register
Data is present in the output queue
bit 7
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
ESB
MAV
ESB1
ESB0
bit 6
SRQ
MSS
Logical sum
&
&
&
&
Bits represent corresponding event registers
Status byte register (STB)
Service request enable register (SRER)
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
×
ESB
MAV
ESB1
ESB0
・・・
・・・・・・・・・・・
・・・
In its implementation of the serial polling function using service requests,
this unit employs the status model specified by IEEE 488.2.
The term "event" refers to any phenomenon which generates a service
request.
Generation of service requests
The status byte register holds information relating to the event registers and
the output queue. It is further possible to use the service request enable
register as a mask to select the items required. If any of the bits selected by
the mask becomes 1, bit 6 (the master summary status or MSS bit) is also
set to 1, an SRQ message is generated, and this generates a service request.
Содержание Power HiTester 3193
Страница 1: ...3193 3193 10 Instruction Manual POWER HiTESTER EN Feb 2019 Revised edition 16 3193A981 16 19 02H ...
Страница 2: ......
Страница 50: ...32 3 9 Operations During Power Failure ...
Страница 76: ...58 4 13 Degaussing ...
Страница 80: ...62 5 2 Setting the Frequency Range fa ...
Страница 108: ...90 9 3 Internal Circuit for the External Control and Timing ...
Страница 112: ...94 10 3 Output Rate ...
Страница 250: ...232 13 9 Error and Overflow Displays ...
Страница 278: ...260 17 5 Internal Block Diagram ...
Страница 284: ...266 19 2 Installation Procedures For JIS standard For EIA standard External Dimensions ...
Страница 300: ...282 20 4 Internal Block Diagram of the 3193 ...
Страница 306: ...INDEX 4 Index ...
Страница 307: ......
Страница 308: ......
Страница 309: ......
Страница 310: ......