VOH/VOL Test
© 2010 Advanced Micro Devices, Inc.
47062 SR5650 Databook 2.00
Proprietary
7-5
Figure 7-2 Sample of a Generic VOH/VOL Tree
The following is the truth table for the above VOH/VOL tree.
below for the list of pins that are on the VOH/VOL tree.
7.4.2
VOH/VOL Tree Activation
To activate the VOH/VOL tree and run a VOH/VOL test, perform the sequence below:
1. Supply a 10MHz clock to I2C_CLK (Test Mode Clock) and a differential clock pair to the HT_REFCLKP/N,
GPP1_REFCLKP/N and GPP3_REFCLKP/N pins.
2. Set POWERGOOD to 0.
3. Set TESTMODE to 1.
4. Set PCIE_RESET_GPIO2 to 0.
5. Wait 5 or more I2C_CLK cycles.
6. Load JTAG instruction register with the instruction 0001 1111.
7. Load JTAG instruction register with the instruction 0010 0000.
8. Load JTAG instruction register with the instruction 0101 1101.
9. Go to Run-Test_Idle state.
10. Set POWERGOOD to 1.
1
6
5
4
3
2
VOH/VOL
mode
TEST_ODD
TEST_EVEN
Table 7-4 Truth Table for the VOH/VOL Tree Outputs
Test Vector
Number
TEST_ODD
Input
TEST_EVEN
Input
Output
Pin 1
Output
Pin 2
Output
Pin 3
Output
Pin 4
Output
Pin 5
Output
Pin 6
1
0
0
0
0
0
0
0
0
2
0
1
0
1
0
1
0
1
3
1
0
1
0
1
0
1
0
4
1
1
1
1
1
1
1
1