Epson S5U13A04B00C User Manual Download

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Rev. 3.1

S1D13A04 LCD/USB Companion Chip

S5U13A04B00C Rev. 1.0

Evaluation Board User Manual

Document Number: X37A-G-004-03.1

Summary of Contents for S5U13A04B00C

Page 1: ...Rev 3 1 S1D13A04 LCD USB Companion Chip S5U13A04B00C Rev 1 0 Evaluation Board User Manual Document Number X37A G 004 03 1 ...

Page 2: ... export and or to otherwise dispose of the products and any technical information furnished if any for the devel opment and or manufacture of weapon of mass destruction or for other military purposes All brands or product names mentioned herein are trademarks and or registered trademarks of their respective companies SEIKO EPSON CORPORATION 2001 2018 All rights reserved Evaluation Board Kit and De...

Page 3: ... 1 PCI Bus Support 18 6 2 Direct Host Bus Interface Support 18 6 3 S1D13A04 Embedded Memory 18 6 4 Adjustable LCD Panel Negative Power Supply 18 6 5 Adjustable LCD Panel Positive Power Supply 19 6 6 Software Adjustable LCD Backlight Intensity Support Using PWM 19 6 7 LCD Panel Support 19 6 7 1 Direct LCD Connector 19 6 7 2 Extended LCD Connector 20 6 8 USB Support 20 6 8 1 USB IRQ Support 20 7 Clo...

Page 4: ...4 Seiko Epson Corporation S5U13A04B00C Rev 1 0 Evaluation Board Rev 3 1 ...

Page 5: ...Board The board is designed as an evaluation platform for the S1D13A04 LCD USB Companion Chip This document is updated as appropriate Please check for the latest revision of this document before beginning any development The latest revision can be downloaded at vdc epson com We appreciate your comments on our documentation Please contact us via email at vdc documentation ea epson com ...

Page 6: ...adjustable negative LCD bias power supply from 14V to 24V Software adjustable backlight intensity support using PWMOUT 4 8 bit 3 3V or 5V single monochrome passive LCD panel support 4 8 16 bit 3 3V or 5V single color passive LCD panel support 9 12 18 bit 3 3V or 5V active matrix TFT LCD panel support Direct interface for 18 bit Epson D TFD LCD panel support Direct interface for 18 bit Sharp HR TFT...

Page 7: ...h the evalu ation board and the S1D13A04 LCD controller to be configured for a specified evaluation platform 3 1 Configuration DIP Switches The S1D13A04 has configuration inputs CNF 6 0 which are read on the rising edge of RESET In order to configure the S1D13A04 for multiple Host Bus Interfaces an eight position DIP switch SW1 is required The following figure shows the location of DIP switch SW1 ...

Page 8: ...H 4 SH 3 interface Big Endian 0 0 0 0 SH 4 SH 3 interface Little Endian 1 0 0 1 MC68K 1 Big Endian 0 0 0 1 Reserved 1 0 1 0 MC68K 2 Big Endian 0 0 1 0 Reserved 1 0 1 1 Generic 1 Big Endian 0 0 1 1 Generic 1 Little Endian 1 1 0 0 Reserved 0 1 0 0 Generic 2 Little Endian 1 1 0 1 RedCap 2 Big Endian 0 1 0 1 Reserved 1 1 1 0 DragonBall Big Endian 0 1 1 0 Reserved X 1 1 1 Reserved SW1 4 CNF3 Configure ...

Page 9: ...ernal oscillator at U7 When no jumper is installed the CLKI source is set to the BUSCLK signal from Header H4 Figure 3 2 Configuration Jumper JP1 Location Table 3 2 Jumper Summary Jumper Function Position 1 2 Position 2 3 No Jumper JP1 CLKI Source VCLKOUT from clock synthesizer External oscillator U7 BUSCLK from Header H4 JP2 CLKI2 Source MCLKOUT from clock synthesizer External oscillator U8 JP3 L...

Page 10: ...LKI2 source to the external oscillator at U8 Figure 3 3 Configuration Jumper JP2 Location JP3 LCD Panel Voltage JP3 selects the voltage level to the LCD panel Position 1 2 sets the voltage level to 5 0V default setting Position 2 3 sets the voltage level to 3 3V Note When configured for Sharp HR TFT or Epson D TFD panels JP3 and JP5 must be set to position 2 3 Figure 3 4 Configuration Jumper JP3 L...

Page 11: ...O0 signal before sending it to H1 When no jumper is installed GPIO0 is not sent to H1 Figure 3 5 Configuration Jumper JP4 Location JP5 GPIO0 Selection JP5 selects the function of the GPIO0 signal Position 1 2 GPIO0 used to control the LCD bias power supplies for STN panels Position 2 3 GPIO0 used as the PS signal when the S1D13A04 is configured for HR TFT panel type Figure 3 6 Configuration Jumper...

Page 12: ... 1 Generic 2 Hitachi SH 3 SH 4 Motorola MC68K 1 Motorola MC68K 2 Motorola REDCAP2 Motorola MC68EZ328 MC68VZ328 DragonBall AB 17 1 A 17 1 A 17 1 A 17 1 A 17 1 A 17 1 A 17 1 A 17 1 AB0 A01 A0 A01 LDS A0 A01 A01 DB 15 0 D 15 0 D 15 0 D 15 0 D 15 0 D 15 0 2 D 15 0 D 15 0 CS External Decode CSn External Decode CSn CSX M R External Decode CLKI BUSCLK BUSCLK CKIO CLK CLK CLK CLK BS Connected to HIOVDD 3 ...

Page 13: ... to DB7 of the S1D13A04 11 Ground 12 Ground 13 Connected to DB8 of the S1D13A04 14 Connected to DB9 of the S1D13A04 15 Connected to DB10 of the S1D13A04 16 Connected to DB11 of the S1D13A04 17 Ground 18 Ground 19 Connected to DB12 of the S1D13A04 20 Connected to DB13 of the S1D13A04 21 Connected to DB14 of the S1D13A04 22 Connected to DB15 of the S1D13A04 23 Connected to RESET of the S1D13A04 24 G...

Page 14: ... Connected to AB8 of the S1D13A04 12 Connected to AB9 of the S1D13A04 13 Connected to AB10 of the S1D13A04 14 Connected to AB11 of the S1D13A04 15 Connected to AB12 of the S1D13A04 16 Connected to AB13 of the S1D13A04 17 Ground 18 Ground 19 Connected to AB14 of the S1D13A04 20 Connected to AB15 of the S1D13A04 21 Connected to AB16 of the S1D13A04 22 Connected to AB17 of the S1D13A04 23 Not connect...

Page 15: ...3 G2 1 D3 R4 1 G2 G3 G5 G5 FPDAT4 9 D0 D4 D0 R2 1 D4 R3 1 D4 R2 1 D8 B5 1 G1 G2 G4 G4 FPDAT5 11 D1 D5 D1 B1 1 D5 G2 1 D5 B1 1 D9 R5 1 G0 G1 G3 G3 FPDAT6 13 D2 D6 D2 G1 1 D6 B1 1 D6 G1 1 D10 G4 1 B2 B3 B5 B5 FPDAT7 15 D3 D7 D3 R1 1 D7 R1 1 D7 R1 1 D11 B3 1 B1 B2 B4 B4 FPDAT8 17 driven 0 driven 0 driven 0 driven 0 driven 0 D4 G3 1 B0 B1 B3 B3 FPDAT9 19 driven 0 driven 0 driven 0 driven 0 driven 0 D5...

Page 16: ...Corporation S5U13A04B00C Rev 1 0 Evaluation Board Rev 3 1 REG 14h bit 0 This GPO can be used to control the HR TFT MOD signal if required For further information see the S1D13A04 Hardware Functional Specification document number X37A A 001 xx ...

Page 17: ...7 4 remain available for USB support or as GPIOs 3 If USB support is enabled REG 4000h bit 7 1 GPIO 7 4 are used by the USB interface GPIO 3 0 remain available for Direct HR TFT interface support or as GPIOs Table 5 2 Extended LCD Signal Connector H2 Pin Name Connector Pin No Monochrome Passive Panel Color Passive Panel Color TFT Panel USB3 Single Single Others HR TFT2 Format 1 Format 2 4 bit 8 bi...

Page 18: ...page 12 Note The PCI Bridge FPGA must be disabled using SW1 8 in order for direct host bus inter face to operate properly 6 3 S1D13A04 Embedded Memory The S1D13A04 has 160K bytes of embedded SRAM The 160K byte display buffer address space is directly and contiguously available through the 18 bit address bus 6 4 Adjustable LCD Panel Negative Power Supply Most monochrome passive LCD panels require a...

Page 19: ...Width Modulation output on PWMOUT PWMOUT can be used to control LCD panels which support PWM control of the backlight inverter The PWMOUT signal is provided on the LCD connector H1 6 7 LCD Panel Support The S1D13A04 directly supports Single panel single drive passive displays 4 8 bit monochrome interface 4 8 16 bit color interface Active Matrix TFT interface 9 12 18 bit interface Direct support fo...

Page 20: ...e S1D13A04 USB controller provides a Revision 1 1 compliant USB client The S1D13A04 acts as a USB device and connects to an upstream hub or USB host through connector J1 on the S5U13A04B00C evaluation board Clamping diodes have been added to protect the USB bus from ESD and shorting 6 8 1 USB IRQ Support The S1D13A04 supports interrupts through output pin IRQ This interrupt can be used to support ...

Page 21: ...e the clock signals to CLKI and CLKI2 Jumpers JP1 and JP2 allow selection of external oscillators U7 and U8 as the clock source for both CLKI and CLKI2 For further information see Table 3 2 Jumper Summary on page 9 7 1 Clock Programming The S1D13A04 utilities automatically program the clock generator If manual programming of the clock generator is required refer to the source code for the S1D13A04...

Page 22: ...d switching diode Rohm BAV99 10 1 H1 HEADER 20X2 20x2 025 sq shrouded header keyed Thomas Betts P N 636 4027 or equivalent 11 1 H2 HEADER 8X2 8x2 025 sq shrouded header keyed Thomas Betts P N 636 1627 or equivalent 12 2 H3 H4 HEADER 17X2 17x2 025 sq unshrouded header right angle Thomas Betts P N 609 3407 or equivalent 13 5 JP1 JP5 HEADER 3 3x1 1 pitch unshrouded header 14 1 J1 USB Type B Right Ang...

Page 23: ...tek Negative Power Supply EPN001 40 1 U11 NC7ST04 TinyLogic HST inverter SOT23 5 package Fairchild NC7ST04 41 1 U12 LT1118CST 2 5 2 5V fixed volt reg SOT 223 Linear Technology LT1118CST 2 5 42 1 U13 LT1117CM 3 3 3 3V fixed volt reg 3 Lead PlasticDD Linear Technology LT1117CM 3 3 43 3 U14 U16 74HCT244 Buffer SO 20 package TI74HCT244 44 1 U17 EPF6016TC14 4 2 144 pin TQFP FLEX6000 FPGA Altera EPF6016...

Page 24: ...C3 0 1u R14 330K 5 C4 0 1u R6 15K 5 C5 0 1u C6 0 1u C7 0 1u R7 15K 5 C8 0 1u R3 15K 5 R5 15K 5 R2 15K 5 U1 SED13A04 A10 B8 C7 C2 D5 B5 C4 B9 C9 A7 A6 C6 D4 A3 D10 C10 C8 B7 E7 B6 C5 B3 D3 G4 F11 E9 D11 A9 D7 E6 A5 A4 C3 E4 D1 E10 E8 D8 D9 B2 D6 B10 D2 E3 E5 E1 E11 F10 F7 F2 F9 K11 L1 G5 E2 F3 F1 G7 G11 G10 F8 K2 L11 K10 F4 F5 G2 G1 G8 H11 H10 G9 K9 J7 L4 H3 H4 G3 H1 L9 J9 H9 K8 L7 L6 K5 J4 L3 H2 L...

Page 25: ...3V 3 3V 3 3V 3 3V 3 3V 3 3V 3 3V 3 3V 5V U8 Test Socket 14 7 8 1 VCC GND OUT NC U4C 74AHC04 5 6 14 7 Y2 48MHz OSC 1 3 2 4 OE OUT GND VDD C20 0 1u C17 0 1u C9 0 1u U7 Test Socket 14 7 8 1 VCC GND OUT NC C19 0 1u U5 NC7SZ04 2 4 5 3 U4D 74AHC04 9 8 14 7 C18 0 1u U4A 74AHC04 1 2 14 7 U2 LT1117CST 5 3 1 2 VIN ADJ VOUT C15 0 1u C10 0 1u C11 0 1u C12 10u 10V R15 15K 5 U3 ICD2061A 13 3 5 1 2 12 14 16 4 6 ...

Page 26: ...7 56uF 35V Low ESR R22 200K Pot 1 3 2 C23 10uF 63V Low ESR C21 0 1u JP5 HEADER 3 1 2 3 C24 10uF 63V Low ESR C25 10uF 63V Low ESR U11 NC7ST04 2 4 5 3 R39 100K Pot 1 3 2 U13 LT1117CM 3 3 3 1 2 VIN ADJ VOUT U10 EPN001 1 2 3 4 5 6 7 8 9 11 10 DC_OUT DC_OUT NC GND GND VOUT_ADJ NC NC NC DC_IN DC_IN Q2 MMBT2222A 1 2 3 Q1 MMBT3906 1 2 3 R16 330K 5 L1 1uH R21 470K 5 R23 15K 5 R19 100K 5 R20 100K 5 R17 1K 5...

Page 27: ... 1 DRDY 1 FPSHIFT 1 FPFRAME 1 GPIO0 1 GPIO1 1 3 GPIO2 1 3 GPIO3 1 3 GPIO4 1 GPIO5 1 GPIO6 1 GPO0 1 GPIO0 1 PWMOUT 1 GPIO7 1 GPIO6 1 GPIO4 1 GPIO5 1 FPDAT 17 0 1 12V 3 3V LCDVCC LCDVCC LCDVCC LCDVCC 3 3V 3 3V VLCD VDDH R29 301K 1 C34 0 1u D1 BAV99 1 3 2 R26 301K 1 H1 HEADER 20X2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 D2 BAV99 1...

Page 28: ...4 2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 ...

Page 29: ...16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 52 53 54 55 56 57 58 59 60 61 62 12V TCK GND TDO 5V 5V INTB INTD PRSNT 1 RESERVED PRSNT 2 RESERVED GND CLK GND REQ VI O AD31 AD29 GND AD27 AD25 3 3V C BE3 AD23 GND AD21 AD19 3 3V AD17 C BE2 GND IRDY 3 3V DEVSEL GND LOCK PERR 3 3V SERR 3 3V C BE1 AD14 GND AD12 AD10 GND AD8 AD7 3 3V AD5 AD3 GND AD1 ...

Page 30: ...Board Layout 30 Seiko Epson Corporation S5U13A04B00C Rev 1 0 Evaluation Board Rev 3 1 10 Board Layout Figure 10 1 S5U13A04B00C Board Layout ...

Page 31: ...cord S5U13A04B00C Rev 1 0 Evaluation Board Seiko Epson Corporation 31 Rev 3 1 11 Change Record X37A G 004 01 Revision 3 1 Issued March 28 2018 updated Sales and Technical Support Section updated some formatting ...

Page 32: ...upport For more information on Epson Display Controllers visit the Epson Global website https global epson com products_and_drivers semicon products display_controllers For Sales and Technical Support contact the Epson representative for your region https global epson com products_and_drivers semicon information support html ...

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