© 2010 Advanced Micro Devices, Inc.
47062 SR5650 Databook 2.00
Proprietary
7-1
Chapter 7
Testability
7.1
Test Capability Features
The SR5650 system controller has integrated test modes and capabilities. These test features cover both the ASIC and
board level testing. The ASIC tests provide a very high fault coverage and low DPM (Defect Per Million) ratio of the part.
The board level tests modes can be used for motherboard manufacturing and debug purposes. The following are the test
modes of the SR5650 system controller:
•
Full scan implementation on the digital core logic that provides about 97% fault coverage through ATPG
(Automatic Test Pattern Generation Vectors).
•
Dedicated test logic for the on-chip custom memory macros to provide complete coverage on these modules.
•
Improved access to the analog modules and PLLs in the SR5650 system controller in order to allow full
evaluation and characterization of these modules.
•
A JTAG test mode (which is not entirely compliant to the IEEE 1149.1 standard) in order to allow board level
testing of neighboring devices.
•
An XOR TREE test mode on all the digital I/O’s to allow for proper soldering verification at the board level.
•
A VOH/VOL test mode on all digital I/O’s to allow for proper verification of output high and output low
voltages at the board level.
These test modes can be accessed through the settings on the instruction register of the JTAG circuitry.
7.2
Test Interface
7.3
XOR Tree
7.3.1
Brief Description of an XOR Tree
A sample of a generic XOR tree is shown in the figure below.
Table 7-1 Pins on the Test Interface
Pin Name
Ball number
Type
Description
TESTMODE
A19
I
TEST_EN: Test Enable (IEEE 1149.1 test port reset)
PCIE_RESET_GPIO3
D19
I
TMS: Test Mode Select (IEEE 1149.1 test mode select)
I2C_DATA
C20
I
TDI: Test Mode Data In (IEEE 1149.1 data in)
I2C_CLK
B20
I
TCLK: Test Mode Clock (IEEE 1149.1 clock)
PWM_GPIO6
B16
O
TDO: Test Mode Data Out (IEEE 1149.1 data out)
PWM_GPIO4
A15
I
TEST_ODD: Control ODD output in VOH/VOL test
PWM_GPIO3
F16
I
TEST_EVEN: Control EVEN output in VOH/VOL test
POWERGOOD
A17
I
I/O Reset