© 2010 Advanced Micro Devices, Inc.
47062 SR5650 Databook 2.00
Proprietary
List of Figures-1
List of Figures
Figure 1-1: SR5650 Branding Diagram for A21 Production ASIC (Eutectic Part)
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Figure 1-2: SR5650 Branding Diagram for A21 Production ASIC (Lead Free Part)
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Figure 2-1: SR5650 Internal Blocks and Interfaces
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Figure 2-2: HyperTransport™ Interface Block Diagram
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Figure 2-3: SR5650 HyperTransport™ Interface Signals
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Figure 2-4: Interrupt Routing Paths in Legacy Mode
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Figure 2-5: Interrupt Routing Paths in Legacy Mode with Integrated IOAPIC
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Figure 2-6: Interrupt Routing Path in MSI Mode
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Figure 2-7: Suggested Platform Level RAS Sideband Signal Connections
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Figure 3-1: SR5650 Interface Block Diagram
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Figure 4-1: SR5650 Power Rail Power Up Sequence
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Figure 5-2: SR5650 692-Pin FCBGA Package Outline
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Figure 5-3: SR5650 Ball Arrangement (Bottom View)
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Figure 5-4: RoHS/Lead-Free Solder (SAC305/405 Tin-Silver-Copper) Reflow Profile
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Figure 7-2: Sample of a Generic VOH/VOL Tree
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