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Rev. 1.1

 

 

S1D13A05 LCD/USB Companion Chip

S5U13A05B00C Rev. 1.0 

Evaluation Board User Manual

Document Number: X40A-G-004-02.1

Summary of Contents for S5U13A05B00C

Page 1: ...Rev 1 1 S1D13A05 LCD USB Companion Chip S5U13A05B00C Rev 1 0 Evaluation Board User Manual Document Number X40A G 004 02 1 ...

Page 2: ... export and or to otherwise dispose of the products and any technical information furnished if any for the devel opment and or manufacture of weapon of mass destruction or for other military purposes All brands or product names mentioned herein are trademarks and or registered trademarks of their respective companies SEIKO EPSON CORPORATION 2002 2018 All rights reserved Evaluation Board Kit and De...

Page 3: ...1D13A05 Embedded Memory 18 6 4 Adjustable LCD Panel Negative Power Supply 18 6 5 Adjustable LCD Panel Positive Power Supply 19 6 6 Software Adjustable LCD Backlight Intensity Support Using PWM 19 6 7 LCD Panel Support 19 6 7 1 LCD Connector 19 6 7 2 Extended LCD Connector 20 6 7 3 TFT Type 3 Extended LCD Connector 20 6 8 USB Support 20 6 8 1 USB IRQ Support 20 6 9 External oscillator support for C...

Page 4: ...4 Seiko Epson Corporation S5U13A05B00C Rev 1 0 Evaluation Board Rev 1 1 THIS PAGE LEFT BLANK ...

Page 5: ...Board The board is designed as an evaluation platform for the S1D13A05 LCD USB Companion Chip This document is updated as appropriate Please check for the latest revision of this document before beginning any development The latest revision can be downloaded at vdc epson com We appreciate your comments on our documentation Please contact us via email at vdc documentation ea epson com ...

Page 6: ...ble backlight intensity support using PWMOUT 4 8 bit 3 3V or 5V single monochrome passive LCD panel support 4 8 16 bit 3 3V or 5V single color passive LCD panel support 9 12 18 bit 3 3V or 5V active matrix TFT LCD panel support Direct interface for 18 bit Sharp HR TFT LCD panel support Direct interface for 18 bit Casio TFT LCD panel support Direct interface for 18 bit TFT Type 2 LCD panel support ...

Page 7: ...he evalu ation board and the S1D13A05 LCD controller to be configured for a specified evaluation platform 3 1 Configuration DIP Switches The S1D13A05 has seven configuration inputs CNF 6 0 which are read on the rising edge of RESET In order to configure the S1D13A05 for multiple Host Bus Interfaces an eight position DIP switch SW1 is required The following figure shows the location of DIP switch S...

Page 8: ...face 1 0 0 0 SH 4 SH 3 interface Big Endian 0 0 0 0 SH 4 SH 3 interface Little Endian 1 0 0 1 MC68K 1 Big Endian 0 0 0 1 Reserved 1 0 1 0 MC68K 2 Big Endian 0 0 1 0 Reserved 1 0 1 1 Generic 1 Big Endian 0 0 1 1 Generic 1 Little Endian 1 1 0 0 Reserved 0 1 0 0 Generic 2 Little Endian 1 1 0 1 RedCap 2 Big Endian 0 1 0 1 Reserved 1 1 1 0 DragonBall Big Endian 0 1 1 0 Reserved X 1 1 1 Reserved SW1 4 C...

Page 9: ...wn below Table 3 2 Jumper Summary Jumper Function Position 1 2 Position 2 3 No Jumper JP1 CLKI Source VCLKOUT from clock synthesizer External oscillator U6 BUSCLK from Header H5 JP2 CLKI2 Source MCLKOUT from clock synthesizer External oscillator U7 JP3 LCD Panel Voltage 3 3V LCDVCC 5V LCDVCC JP4 PCI_IRQ Disable Enable USB IRQ on PCI Disable USB IRQ on PCI JP5 GP00 Polarity on H3 Normal Active High...

Page 10: ...n no jumper is installed the CLKI source is the BUSCLK signal from Header H5 Figure 3 2 Configuration Jumper JP1 Location JP2 CLKI2 Source JP2 selects the source for the CLKI2 input pin When the jumper is at position 1 2 the CLKI2 source is MCLKOUT from the Cypress clock synthesizer default setting When the jumper is at position 2 3 the CLKI2 source is the external oscillator at U7 Figure 3 3 Conf...

Page 11: ...he voltage level is 5 0V Note When configured for Sharp HR TFT JP3 and JP5 must be set to position 1 2 Figure 3 4 Configuration Jumper JP3 Location JP4 PCI_IRQ Enable JP4 selects whether the USB IRQ on PCI is enabled or disabled When the jumper is at position 1 2 the USB IRQ on PCI is enabled default setting When no jumper is installed the USB IRQ on PCI is disabled Figure 3 5 Configuration Jumper...

Page 12: ...FT Type 3 Extended LCD Connector H3 When the jumper is at position 1 2 the GPO0 signal is sent directly active high to H3 default setting When the jumper is at position 2 3 the GPO0 signal is inverted and then sent active low to H3 When no jumper is installed GPO0 is not sent to H3 Figure 3 6 Configuration Jumper JP5 Location Normal Inverted GPIO0 not JP5 Active High Active Low sent to H1 ...

Page 13: ...c 1 Generic 2 Hitachi SH 3 SH 4 Motorola MC68K 1 Motorola MC68K 2 Motorola REDCAP2 Motorola MC68EZ328 MC68VZ328 DragonBall AB 17 1 A 17 1 A 17 1 A 17 1 A 17 1 A 17 1 A 17 1 A 17 1 AB0 A01 A0 A01 LDS A0 A01 A01 DB 15 0 D 15 0 D 15 0 D 15 0 D 15 0 D 15 0 2 D 15 0 D 15 0 CS External Decode CSn External Decode CSn CSX M R External Decode CLKI BUSCLK BUSCLK CKIO CLK CLK CLK CLKO BS Connected to IOVDD 3...

Page 14: ... to DB7 of the S1D13A05 11 Ground 12 Ground 13 Connected to DB8 of the S1D13A05 14 Connected to DB9 of the S1D13A05 15 Connected to DB10 of the S1D13A05 16 Connected to DB11 of the S1D13A05 17 Ground 18 Ground 19 Connected to DB12 of the S1D13A05 20 Connected to DB13 of the S1D13A05 21 Connected to DB14 of the S1D13A05 22 Connected to DB15 of the S1D13A05 23 Connected to RESET of the S1D13A05 24 G...

Page 15: ... Connected to AB8 of the S1D13A05 12 Connected to AB9 of the S1D13A05 13 Connected to AB10 of the S1D13A05 14 Connected to AB11 of the S1D13A05 15 Connected to AB12 of the S1D13A05 16 Connected to AB13 of the S1D13A05 17 Ground 18 Ground 19 Connected to AB14 of the S1D13A05 20 Connected to AB15 of the S1D13A05 21 Connected to AB16 of the S1D13A05 22 Connected to AB17 of the S1D13A05 23 Not connect...

Page 16: ...2 D6 D2 G1 1 D6 B1 1 D6 G1 1 D10 G4 1 B2 B3 B5 B5 B5 B5 B5 B5 FPDAT7 15 D3 D7 D3 R1 1 D7 R1 1 D7 R1 1 D11 B3 1 B1 B2 B4 B4 B4 B4 B4 B4 FPDAT8 17 driven 0 driven 0 driven 0 driven 0 driven 0 D4 G3 1 B0 B1 B3 B3 B3 B3 B3 B3 FPDAT9 19 driven 0 driven 0 driven 0 driven 0 driven 0 D5 B2 1 driven 0 R0 R2 R2 R2 R2 R2 R2 FPDAT10 21 driven 0 driven 0 driven 0 driven 0 driven 0 D6 R2 1 driven 0 driven 0 R1 ...

Page 17: ...s Color TFT Panel USB2 Others Sharp HR TFT1 Casio TFT1 TFT Type 21 TFT Type 31 TFT Type 4 9 bit 12 bit 18 bit 18 bit 18 bit 18 bit 18 bit 18 bit GPIO0 1 GPIO0 PS POL VCLK CPV GPIO0 GPIO0 GPIO1 3 GPIO1 CLS GRES AP OE GPIO1 GPIO1 GPIO2 5 GPIO2 REV FRP POL POL GPIO2 GPIO2 GPIO3 7 GPIO3 SPL STH STH EIO GPIO3 GPIO3 GPIO4 9 GPIO4 USBPUP GPIO5 11 GPIO5 USBDETECT GPIO6 13 GPIO6 USBDM GPIO7 15 GPIO7 USBDP ...

Page 18: ...PU Interface on page 13 Note If a direct host bus interface is used the PCI Bridge FPGA must be disabled using SW1 8 6 3 S1D13A05 Embedded Memory The S1D13A05 has 256K bytes of embedded SRAM The 256K byte display buffer address space is directly and contiguously available through the 18 bit address bus 6 4 Adjustable LCD Panel Negative Power Supply Most monochrome passive LCD panels require a nega...

Page 19: ...pport PWM control of the backlight inverter The PWMOUT signal is provided on LCD Connector H1 6 7 LCD Panel Support The S1D13A05 directly supports Single panel single drive passive displays 4 8 bit monochrome interface 4 8 16 bit color interface Active Matrix TFT interface 9 12 18 bit interface Direct support for 18 bit Sharp HR TFT LCD panel Direct support for 18 bit Casio TFT LCD panel Direct su...

Page 20: ... or USB host through connector J1 on the S5U13A05B00C evaluation board Clamping diodes have been added to protect the USB bus from ESD and shorting 6 8 1 USB IRQ Support The S1D13A05 supports interrupts using the output pin IRQ In order to support interrupts from the USB client of the S1D13A05 the S5U13A05B00C evaluation board connects IRQ to PCI interrupt INTA from the PCI slot The IRQ pin output...

Page 21: ...pson Corporation 21 Rev 1 1 down resistor and removing the oscillator or clock source If an oscillator or another type of clock external source is used USBOCSI needs to be disabled by using a pull down resistor and disabling or removing the crystal oscillator circuitry ...

Page 22: ... the clock signals to CLKI and CLKI2 Jumpers JP1 and JP2 allow selection of external oscillators U7 and U8 as the clock source for both CLKI and CLKI2 For further information see Table 3 2 Jumper Summary on page 9 7 1 Clock Programming The S1D13A05 utilities automatically program the clock generator If manual programming of the clock generator is required refer to the source code for the S1D13A05 ...

Page 23: ... UNITED CHEMI CON KMF63VB10RM5X11LL or equivalent 7 1 C30 56uF 35V Electrolytic Radial Lead 56uF 35V 20 NIPPON UNITED CHEMI CON KMF35VB56RM5X11LL or equivalent 8 9 C39 C40 C41 C42 C43 C44 C45 C46 C47 0 22uF Ceramic Chip 0 22uF 50V X7R 5 1206 pckg Kemet C1206C224J5RAC or equivalent capacitor 9 2 C48 C52 33uF 20V Tantalum D Size 33uF 20V 10 Kemet T491D336K020AS altern Panasonic ECST1AD686R Digikey 1...

Page 24: ...ivalent PTH 30 1 R15 330K 1206 1206 Resistor 330K 5 Do not purchase Do not populate 31 5 R17 R18 R30 R31 R36 1K 5 1206 Resistor 1K 5 32 3 R19 R20 R28 100K 5 1206 Resistor 100K 5 33 1 R21 100K Pot 100K Trim pot Bourns 3386W 1 104 or equivalent PTH 34 1 R22 1 5K 1 1206 Resistor 1 5K 1 35 1 R23 150K 1 1206 Resistor 150K 1 36 2 R27 R24 301K 1 1206 Resistor 301K 1 37 2 R26 R25 20 1 1206 Resistor 20 Ohm...

Page 25: ...1117CM 3 3 51 3 U13 U15 U16 74HCT244 Buffer SO 20 package TI74HCT244 or equivalent 52 1 U14 74AHC1G125 SOT 23 53 1 U17 EPF6016TC14 4 2 TQFP 144 pin FLEX 6000 FPGA Altera EPF6016TC144 2 54 1 U18 EPC1441PC8 8 pin DIP package OTP EPROM Socketed Altera EPC1441PC8 Socketed 55 1 U18 Socket 8 pin narrow DIP screw machine socket Socket for U18 56 1 Y1 14 31818MHz Vertical mount HC 49 14 31818MHz crystal H...

Page 26: ...L9 E9 D11 A9 D7 E6 A5 A4 C3 E4 D1 E10 E8 D8 D9 K2 D6 F2 D2 E3 E5 E1 E11 F10 F7 B2 G5 C1 B1 F9 E2 F3 F1 G7 G11 G10 F8 K10 C11 B10 F4 F5 G2 G1 G8 H11 H10 G9 K9 J7 L4 H3 H4 G3 H1 F11 J9 H9 K8 L7 L6 K5 J4 L3 H2 L2 J8 K7 K6 G6 J5 K3 J2 A10 L8 H7 C2 L5 K4 J3 L10 J10 J6 H5 J1 K1 H8 J11 F6 A11 L11 A8 A1 L1 B4 B11 K11 IOVDD CNF4 CNF2 COREVDD AB12 AB10 AB6 CLKI2 CNF6 CNF0 AB15 AB16 AB8 AB4 FPDAT15 FPDAT17 C...

Page 27: ...14 7 U7 Test Socket 14 7 8 1 VCC GND OUT NC U3D 74AHC04 9 8 14 7 C20 7pF C17 n p U6 Test Socket 14 7 8 1 VCC GND OUT NC R12 15K 5 U5 Test Socket 14 7 8 1 VCC GND OUT NC U2 LT1117CST 5 3 1 2 VIN ADJ VOUT U3C 74AHC04 5 6 14 7 C16 n p C22 0 1uF Y2 48MHz 1 3 2 4 JP1 HEADER 3 1 2 3 C21 7pF C15 0 1uF U4 ICD2061A 13 3 5 1 2 12 14 16 4 6 7 11 15 8 9 10 VDD AVDD GND S0 CLK S1 DATA INIT0 INIT1 PWRDWN OE XTA...

Page 28: ...DER 2 1 2 R13 470K 5 C34 68uF 10V C26 10uF 63V Low ESR C32 68uF 10V R16 15K 5 U10 EPN001 1 2 3 4 5 6 7 8 9 11 10 DC_OUT DC_OUT NC GND GND VOUT_ADJ NC NC NC DC_IN DC_IN C30 56uF 35V Low ESR C27 10uF 63V Low ESR U11 RC1117S25T 3 1 2 VIN ADJ VOUT R19 100K 5 U8 RD 0412 1 2 3 4 5 6 7 8 9 10 11 12 VOUT_ADJ DC_IN REMOTE GND GND GND GND GND NC GND GND DC_OUT Q2 MMBT2222A 1 2 3 R14 200K Pot 1 3 2 U9 NC7ST0...

Page 29: ...LCDVCC VLCD VDDH 3 3V 3 3V 3 3V 3 3V 3 3V 3 3V J1 USB B Connector 1 2 3 4 VBus DM DP GND C37 0 1uF R26 20 1 L2 Ferrite H2 HEADER 8X2 2 4 6 8 10 12 14 16 1 3 5 7 9 11 13 15 TP1 HEADER 1 1 R23 150K 1 D1 BAV99 1 3 2 R27 301K 1 R25 20 1 H1 HEADER 20X2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 D2 BAV99 1 3 2 U16 74HCT244 2 4 6 8 11 13...

Page 30: ...35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 IO1 IO2 IO3 nCE GND Vccin...

Page 31: ...RESERVED VI O RESERVED RESERVED RST VI O GNT GND RESERVED AD30 3 3V AD28 AD26 GND AD24 IDSEL 3 3V AD22 AD20 GND AD18 AD16 3 3V FRAME GND TRDY GND STOP 3 3V SDONE SBO GND PAR AD15 3 3V AD13 AD11 GND AD9 C BE0 3 3V AD6 AD4 GND AD2 AD0 VI O REQ64 5V 5V C48 33uF 20V C50 68uF 10V H5 HEADER 17X2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 C49 68uF 10V C52...

Page 32: ...Board Layout 32 Seiko Epson Corporation S5U13A05B00C Rev 1 0 Evaluation Board Rev 1 1 10 Board Layout Figure 10 1 S5U13A05B00C Board Layout Top View ...

Page 33: ...Board Layout S5U13A05B00C Rev 1 0 Evaluation Board Seiko Epson Corporation 33 Rev 1 1 Figure 10 2 S5U13A05B00C Board Layout Bottom View ...

Page 34: ...cord 34 Seiko Epson Corporation S5U13A05B00C Rev 1 0 Evaluation Board Rev 1 1 11 Change Record X40A G 004 02 Revision 1 1 Issued March 28 2018 updated Sales and Technical Support Section updated some formatting ...

Page 35: ...upport For more information on Epson Display Controllers visit the Epson Global website https global epson com products_and_drivers semicon products display_controllers For Sales and Technical Support contact the Epson representative for your region https global epson com products_and_drivers semicon information support html ...

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