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ZAP OVC
6-395
ZAP OVC
Clear Overflow Counter
SYNTAX OPTIONS
OPCODE
OBJMODE
RPT
CYC
ZAP OVC
0101 0110 0101 1100
1
−
1
Operands
OVC
overflow counter bits in Status Register 0 (ST0)
Description
Clear the overflow counter (OVC) bits in Status Register 0 (ST0).
Flags and
Modes
OVC
The 6-bit overflow counter bits (OVC) are cleared.
Repeat
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
Example
; Calculate: VarD = sat(VarA + VarB + VarC)
ZAP OVC
; Zero overflow counter
MOVL ACC,@VarA
; ACC = VarA
ADDL ACC,@VarB
; ACC = ACC + VarB
ADDL ACC,@VarC
; ACC = ACC + VarC
SAT ACC
; Saturate if OVC != 0
MOVL @VarD,ACC
; Store saturated result into VarD
Summary of Contents for TMS320C28x
Page 30: ...1 12...
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Page 269: ...IN loc16 PA 6 112 MOV AL 0 AL 0 UOUT IORegC AL IOspace IORegC AL 10...
Page 308: ...MAXCUL P loc32 6 151 Saturate MOVL Var64 2 ACC Store result into Var64 MOVL Var64 P...
Page 509: ...SUBL ACC P PM 6 352 SUBL ACC P PM ACC S B 11 M X 4 MOVH Y ACC 5 Store Q15 result into Y...
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