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AH.LSB:
Least significant byte of AH
. The name given to bits 23 through 16
of the accumulator.
AH.MSB:
Most significant byte of AH
. The name given to bits 31 through 24
of the accumulator.
AL:
Low word of the accumulator.
The name given to bits 15 through 0 of the
accumulator.
AL.LSB:
Least significant byte of AL
. The name given to bits 7 through 0 of
the accumulator.
AL.MSB:
Most significant byte of AL
. The name given to bits 15 through 8
of the accumulator.
ALU:
See
arithmetic logic unit (ALU)
.
analysis logic:
A portion of the emulation logic in the core. The analysis log-
ic is responsible for managing the following debug activities: hardware
breakpoints, hardware watchpoints, data logging, and benchmark/event
counting.
approve an interrupt request:
Allow an interrupt to be serviced. If the inter-
rupt is maskable, the CPU approves the request only if it is properly en-
abled. If the interrupt is nonmaskable, the CPU approves the request im-
mediately. See also
interrupt request
and
service an interrupt
.
ARAU:
See
address register arithmetic unit (ARAU)
.
arithmetic logic unit (ALU):
A 32-bit hardware unit in the CPU that per-
forms 2s-complement arithmetic and Boolean logic operations. The ALU
accepts inputs from data from registers, from data memory, or from the
program control logic. The ALU sends results to a register or to data
memory.
arithmetic shift:
A shift that treats the shifted value as signed. See also
log-
ical shift
.
ARP:
See
auxiliary register pointer (ARP)
.
ARP indirect addressing mode:
The indirect addressing mode that uses
the current auxiliary register to point to a location in data space. The cur-
rent auxiliary register is the auxiliary register pointed to by the ARP. See
also
auxiliary register pointer (ARP)
.
automatic context save:
A save of system context (modes and key register
values) performed by the CPU just prior to executing an interrupt service
routine. See also
context save
.
Glossary
Summary of Contents for TMS320C28x
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Page 269: ...IN loc16 PA 6 112 MOV AL 0 AL 0 UOUT IORegC AL IOspace IORegC AL 10...
Page 308: ...MAXCUL P loc32 6 151 Saturate MOVL Var64 2 ACC Store result into Var64 MOVL Var64 P...
Page 509: ...SUBL ACC P PM 6 352 SUBL ACC P PM ACC S B 11 M X 4 MOVH Y ACC 5 Store Q15 result into Y...
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