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AND IFR,#16bit
6-47
AND IFR,#16bit
Bitwise AND to Clear Pending CPU Interrupts
SYNTAX OPTIONS
OPCODE
OBJMODE
RPT
CYC
AND IFR,#16bit
0111 0110 0010 1111
CCCC CCCC CCCC CCCC
X
−
2
Operands
IFR
Interrupt flag register
#16bit
16-bit immediate constant value (0x0000 to 0xFFFF)
Description
Clear specific pending interrupts by performing a bitwise AND operation with
the IFR register and the 16-bit immediate value. The result of the AND
operation is stored in the IFR register:
IFR = IFR AND #16bit;
Note:
Interrupt hardware has priority over CPU instruction operation in cases where the
interrupt flag is being simultaneously modified by the hardware and the instruction.
Flags and
Modes
None
Repeat
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
Example
; Clear the contents of the IFR register. Disables all
; pending interrupts:
AND IFR,#0x0000
; Clear IFR register
Summary of Contents for TMS320C28x
Page 30: ...1 12...
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Page 269: ...IN loc16 PA 6 112 MOV AL 0 AL 0 UOUT IORegC AL IOspace IORegC AL 10...
Page 308: ...MAXCUL P loc32 6 151 Saturate MOVL Var64 2 ACC Store result into Var64 MOVL Var64 P...
Page 509: ...SUBL ACC P PM 6 352 SUBL ACC P PM ACC S B 11 M X 4 MOVH Y ACC 5 Store Q15 result into Y...
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