Texas Instruments TMS320C28x, Reference Manual

Page: 234 / 695

CMP64 ACC:P
6-77
CMP64 ACC:P Compare 64-bit Value
SYNTAX OPTIONS OPCODE OBJMODE RPT CYC
CMP64 ACC:P
0101 0110 0101 1110
1 − 1
Operands ACC:P Accumulator register (ACC) and product register (P)
Description The 64-bit content of the combined ACC:P registers is compared against zero
and the flags are set appropriately:
if((V = 1) & (ACC(bit 31) = 1))
N = 0;
else
N = 1;
if((V = 1) & (ACC(bit 31) = 0))
N = 1;
else
N = 0;
if(ACC:P = 0x8000 0000 0000 0000)
Z = 1;
else
Z = 0;
V = 0;
Note: This operation should be used as follows:
CMP64 ACC:P ; Clear V flag
perform 64-bit operation
CMP64 ACC:P ; Set Z,N flags, V=0
conditionally branch
Flags and
Modes
N The content of the ACC register is tested to determine if the 64-bit ACC:P
value is negative. The CMP64 instruction takes into account the state of the
overflow flag (V) to increase precision when determining if ACC is negative.
For example, consider the subtraction on ACC of 0x8000 0000 − 0x0000
0001. This results in an overflow to a positive number (0x7FFF FFFF) and V
would be set. Because the CMP64 instruction takes into account the
overflow, it would interpret the result as a negative number and not a positive
number. If the value is ACC is found to be negative, then N is set; otherwise N
is cleared.
Z The zero flag bit is set if the combined 64 bits of ACC:P is zero, otherwise it is
cleared.
V The state of the V flag is used along with bit 31 of the ACC register to determine
if the value in the ACC:P register is negative. V is cleared by the operation.
Repeat This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.