Texas Instruments TMS320C28x, Reference Manual

Page: 198 / 695

ADDUL ACC, loc32
6-41
ADDUL ACC, loc32 Add 32-bit Unsigned Value to Accumulator
SYNTAX OPTIONS OPCODE OBJMODE RPT CYC
ADDUL ACC, loc32
0101 0110 0101 0011
xxxx xxxx LLLL LLLL
1 Y N+1
Operands ACC Accumulator register
loc32 Addressing mode (see Chapter 5)
Description Add to the ACC register the unsigned 32-bit content of the location pointed to
by the “loc32” addressing mode:
ACC = ACC + [loc32]; // unsigned add
Note: The difference between a signed and unsigned 32-bit add is in the treatment of the
overflow counter (OVC). For a signed ADD, the OVC counter monitors
positive/negative overflow. For an unsigned ADD, the OVC unsigned (OVCU) counter
monitors the carry.
Flags and
Modes
Z After the addition, the Z flag is set if the ACC value is zero, else Z is cleared.
N After the addition, the N flag is set if bit 31 of the ACC is 1, else N is
cleared.
C If the addition generates a carry, C is set; otherwise C is cleared.
V If an overflow occurs, V is set; otherwise V is not affected.
OVCU The overflow counter is incremented when the addition operation generates
an unsigned carry. The OVM mode does not affect the OVCU counter.
Repeat If this operation is repeated, then the instruction will be executed N+1 times.
The state of the Z, N, C flags will reflect the final result. The V flag will be set if
an intermediate overflow occurs. The OVCU will count intermediate carries.
Example
; Add two 64-bit values (VarA and VarB) and store result in VarC:
MOVL ACC,@VarA+0 ; Load ACC with contents of the low
; 32 bits of VarA
ADDUL ACC,@VarB+0 ; Add to ACC the contents of the low
; 32 bits of VarB
MOVL @VarC+0,ACC ; Store low 32-bit result into VarC
MOVL ACC,@VarA+2 ; Load ACC with contents of the high
; 32 bits of VarA
ADDCL ACC,@VarB+2 ; Add to ACC the contents of the high
; 32 bits of VarB with carry
MOVL @VarC+2,ACC ; Store high 32-bit result into VarC