![background image](http://html1.mh-extra.com/html/texas-instruments/tms320c28x/tms320c28x_reference-manual_1097071221.webp)
C28ADDR
6-64
C28ADDR
Clear the AMODE Status Bit
SYNTAX OPTIONS
OPCODE
OBJMODE
RPT
CYC
C28ADDR
0101 0110 0001 0110
X
−
1
Note:
This instruction is an alias for the “CLRC AMODE” operation.
Operands
None
Description
Clear the AMODE status bit in Status Register ST1, putting the device in
C27x/C28x addressing mode (see Chapter 5).
Note:
This instruction does not flush the pipeline.
Flags and
Modes
AMODE
The AMODE bit is cleared.
Repeat
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
Example
; Execute the operation ”VarC = VarA + VarB” written in
; C2xLP syntax:
LPADDR
; Full C2xLP address compatible mode
.lp_amode
; Tell assembler we are in C2xLP mode
LDP #VarA
; Initialize DP (low 64K only)
LACL VarA
; ACC = VarA (ACC high = 0)
ADDS VarB
; ACC = ACC + VarB (unsigned)
SACL VarC
; Store result into VarC
C28ADDR
; Return to C28x address mode
.c28_amode
; Tell assembler we are in C28x mode
Summary of Contents for TMS320C28x
Page 30: ...1 12...
Page 80: ...This page intentionally left blank 2 50 This page intentionally left blank...
Page 269: ...IN loc16 PA 6 112 MOV AL 0 AL 0 UOUT IORegC AL IOspace IORegC AL 10...
Page 308: ...MAXCUL P loc32 6 151 Saturate MOVL Var64 2 ACC Store result into Var64 MOVL Var64 P...
Page 509: ...SUBL ACC P PM 6 352 SUBL ACC P PM ACC S B 11 M X 4 MOVH Y ACC 5 Store Q15 result into Y...
Page 585: ...This page intentionally left blank 7 32 This page intentionally left blank...